// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design implementation internals
// See Vcva6_core_only_tb.h for the primary calling header

#include "Vcva6_core_only_tb.h"
#include "Vcva6_core_only_tb__Syms.h"

void Vcva6_core_only_tb::_eval_initial(Vcva6_core_only_tb__Syms* __restrict vlSymsp) {
    VL_DEBUG_IF(VL_DBG_MSGF("+    Vcva6_core_only_tb::_eval_initial\n"); );
    Vcva6_core_only_tb* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
    // Body
    vlTOPp->_initial__TOP__1(vlSymsp);
    vlTOPp->__Vclklast__TOP__verilator_clk_i = vlTOPp->verilator_clk_i;
    vlTOPp->__Vclklast__TOP__verilator_rstn_i = vlTOPp->verilator_rstn_i;
}

void Vcva6_core_only_tb::final() {
    VL_DEBUG_IF(VL_DBG_MSGF("+    Vcva6_core_only_tb::final\n"); );
    // Variables
    Vcva6_core_only_tb__Syms* __restrict vlSymsp = this->__VlSymsp;
    Vcva6_core_only_tb* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
    // Body
    vlTOPp->_final_TOP(vlSymsp);
}

void Vcva6_core_only_tb::_eval_settle(Vcva6_core_only_tb__Syms* __restrict vlSymsp) {
    VL_DEBUG_IF(VL_DBG_MSGF("+    Vcva6_core_only_tb::_eval_settle\n"); );
    Vcva6_core_only_tb* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
    // Body
    vlTOPp->_settle__TOP__2(vlSymsp);
    vlTOPp->_settle__TOP__3(vlSymsp);
    vlTOPp->_settle__TOP__4(vlSymsp);
    vlTOPp->_settle__TOP__5(vlSymsp);
    vlTOPp->_settle__TOP__6(vlSymsp);
    vlTOPp->_settle__TOP__7(vlSymsp);
    vlTOPp->_settle__TOP__8(vlSymsp);
    vlTOPp->_settle__TOP__9(vlSymsp);
    vlTOPp->_settle__TOP__10(vlSymsp);
    vlTOPp->_settle__TOP__11(vlSymsp);
    vlTOPp->_settle__TOP__12(vlSymsp);
    vlTOPp->_settle__TOP__13(vlSymsp);
    vlTOPp->_settle__TOP__30(vlSymsp);
}

void Vcva6_core_only_tb::_ctor_var_reset() {
    VL_DEBUG_IF(VL_DBG_MSGF("+    Vcva6_core_only_tb::_ctor_var_reset\n"); );
    // Body
    verilator_clk_i = VL_RAND_RESET_I(1);
    verilator_rstn_i = VL_RAND_RESET_I(1);
    tb_exit_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__clk_cntr = VL_RAND_RESET_I(32);
    VL_RAND_RESET_W(281, cva6_core_only_tb__DOT____Vcellout__i_cva6__axi_req_o);
    cva6_core_only_tb__DOT__req = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__we = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__addr = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(84, cva6_core_only_tb__DOT____Vcellout__i_axi_master_connect_cva6_to_mem__axi_resp_o);
    cva6_core_only_tb__DOT__i_cva6__DOT__priv_lvl = VL_RAND_RESET_I(2);
    VL_RAND_RESET_W(129, cva6_core_only_tb__DOT__i_cva6__DOT__ex_commit);
    VL_RAND_RESET_W(134, cva6_core_only_tb__DOT__i_cva6__DOT__resolved_branch);
    cva6_core_only_tb__DOT__i_cva6__DOT__eret = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__commit_ack = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__trap_vector_base_commit_pcgen = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__epc_commit_pcgen = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(292, cva6_core_only_tb__DOT__i_cva6__DOT__fetch_entry_if_id);
    cva6_core_only_tb__DOT__i_cva6__DOT__fetch_ready_id_if = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(206, cva6_core_only_tb__DOT__i_cva6__DOT__fu_data_id_ex);
    cva6_core_only_tb__DOT__i_cva6__DOT__pc_id_ex = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__is_compressed_instr_id_ex = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__flu_ready_ex_id = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__flu_trans_id_ex_id = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__flu_result_ex_id = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(129, cva6_core_only_tb__DOT__i_cva6__DOT__flu_exception_ex_id);
    VL_RAND_RESET_W(67, cva6_core_only_tb__DOT__i_cva6__DOT__branch_predict_id_ex);
    cva6_core_only_tb__DOT__i_cva6__DOT__fpu_ready_ex_id = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(129, cva6_core_only_tb__DOT__i_cva6__DOT__fpu_exception_ex_id);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_commit_commit_ex = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__dirty_fp_state = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__lsu_commit_commit_ex = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__no_st_pending_commit = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__amo_valid_commit = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__we_gpr_commit_id = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__we_fpr_commit_id = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__enable_translation_csr_ex = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ld_st_priv_lvl_csr_ex = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_op_commit_csr = VL_RAND_RESET_I(7);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_wdata_commit_csr = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(129, cva6_core_only_tb__DOT__i_cva6__DOT__csr_exception_csr_commit);
    VL_RAND_RESET_W(194, cva6_core_only_tb__DOT__i_cva6__DOT__irq_ctrl_csr_id);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_write_fflags_commit_cs = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__icache_en_csr = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__we_csr_perf = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__icache_flush_ctrl_cache = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__itlb_miss_ex_perf = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__dtlb_miss_ex_perf = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__icache_miss_cache_perf = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__set_pc_ctrl_pcgen = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__flush_csr_ctrl = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__flush_unissued_instr_ctrl_id = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__flush_ctrl_if = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__flush_ctrl_id = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__flush_ctrl_ex = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__flush_tlb_ctrl_ex = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__fence_i_commit_controller = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__fence_commit_controller = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__sfence_vma_commit_controller = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__halt_ctrl = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__dcache_flush_ctrl_cache = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__set_debug_pc = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__flush_commit = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(186, cva6_core_only_tb__DOT__i_cva6__DOT__icache_areq_ex_cache);
    VL_RAND_RESET_W(65, cva6_core_only_tb__DOT__i_cva6__DOT__icache_areq_cache_ex);
    VL_RAND_RESET_W(68, cva6_core_only_tb__DOT__i_cva6__DOT__icache_dreq_if_cache);
    VL_RAND_RESET_W(227, cva6_core_only_tb__DOT__i_cva6__DOT__icache_dreq_cache_if);
    VL_RAND_RESET_W(135, cva6_core_only_tb__DOT__i_cva6__DOT__amo_req);
    VL_RAND_RESET_W(65, cva6_core_only_tb__DOT__i_cva6__DOT__amo_resp);
    cva6_core_only_tb__DOT__i_cva6__DOT____Vcellinp__issue_stage_i__wt_valid_i = VL_RAND_RESET_I(4);
    VL_RAND_RESET_W(516, cva6_core_only_tb__DOT__i_cva6__DOT____Vcellinp__issue_stage_i__ex_ex_i);
    VL_RAND_RESET_W(256, cva6_core_only_tb__DOT__i_cva6__DOT____Vcellinp__issue_stage_i__wbdata_i);
    cva6_core_only_tb__DOT__i_cva6__DOT____Vcellinp__issue_stage_i__trans_id_i = VL_RAND_RESET_I(12);
    VL_RAND_RESET_W(128, cva6_core_only_tb__DOT__i_cva6__DOT____Vcellout__commit_stage_i__wdata_o);
    cva6_core_only_tb__DOT__i_cva6__DOT____Vcellout__commit_stage_i__waddr_o = VL_RAND_RESET_I(10);
    cva6_core_only_tb__DOT__i_cva6__DOT____Vcellout__csr_regfile_i__perf_data_o = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT____Vcellout__csr_regfile_i__csr_rdata_o = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__f = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__cycles = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__unnamedblk1__DOT__mode = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__icache_data_q = VL_RAND_RESET_I(32);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__icache_valid_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__icache_ex_valid_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__icache_vaddr_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__instr_queue_ready = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(65, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__btb_q);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__bht_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__npc_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__npc_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__npc_rst_load_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__replay = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__rvi_return = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__rvi_call = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__rvi_branch = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__rvi_jalr = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__rvi_jump = VL_RAND_RESET_I(2);
    VL_RAND_RESET_W(128, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__rvi_imm);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__rvc_branch = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__rvc_jump = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__rvc_jr = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__rvc_return = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__rvc_jalr = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__rvc_call = VL_RAND_RESET_I(2);
    VL_RAND_RESET_W(128, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__rvc_imm);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__instruction_valid = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__bht_prediction_shifted = VL_RAND_RESET_I(4);
    VL_RAND_RESET_W(130, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__btb_prediction_shifted);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__is_mispredict = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__ras_push = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__ras_pop = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__ras_update = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__predict_address = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__cf_type = VL_RAND_RESET_I(6);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__taken_rvi_cf = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__taken_rvc_cf = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT____Vcellout__i_instr_realign__instr_o = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(128, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT____Vcellout__i_instr_realign__addr_o);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__bp_valid = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__is_branch = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__is_call = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__is_jump = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__is_return = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__is_jalr = VL_RAND_RESET_I(2);
    VL_RAND_RESET_W(66, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__bht_update);
    VL_RAND_RESET_W(129, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__btb_update);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__speculative_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__speculative_d = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(130, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT____Vcellout__i_btb__btb_prediction_o);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT____Vcellout__i_bht__bht_prediction_o = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__npc_select__DOT__fetch_address = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT____Vcellout__gen_instr_scan__BRA__0__KET____DOT__i_instr_scan__rvc_jalr_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT____Vcellout__gen_instr_scan__BRA__0__KET____DOT__i_instr_scan__rvc_jr_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT____Vcellout__gen_instr_scan__BRA__0__KET____DOT__i_instr_scan__rvi_imm_o = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT____Vcellout__gen_instr_scan__BRA__1__KET____DOT__i_instr_scan__rvc_jalr_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT____Vcellout__gen_instr_scan__BRA__1__KET____DOT__i_instr_scan__rvc_jr_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT____Vcellout__gen_instr_scan__BRA__1__KET____DOT__i_instr_scan__rvi_imm_o = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_realign__DOT__instr_is_compressed = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_realign__DOT__unaligned_instr_d = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_realign__DOT__unaligned_instr_q = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_realign__DOT__unaligned_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_realign__DOT__unaligned_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_realign__DOT__unaligned_address_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_realign__DOT__unaligned_address_q = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(130, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_ras__DOT__stack_d);
    VL_RAND_RESET_W(130, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_ras__DOT__stack_q);
    for (int __Vi0=0; __Vi0<16; ++__Vi0) {
        for (int __Vi1=0; __Vi1<2; ++__Vi1) {
            VL_RAND_RESET_W(65, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_btb__DOT__btb_d[__Vi0][__Vi1]);
        }
    }
    for (int __Vi0=0; __Vi0<16; ++__Vi0) {
        for (int __Vi1=0; __Vi1<2; ++__Vi1) {
            VL_RAND_RESET_W(65, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_btb__DOT__btb_q[__Vi0][__Vi1]);
        }
    }
    for (int __Vi0=0; __Vi0<64; ++__Vi0) {
        for (int __Vi1=0; __Vi1<2; ++__Vi1) {
            cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_d[__Vi0][__Vi1] = VL_RAND_RESET_I(3);
        }
    }
    for (int __Vi0=0; __Vi0<64; ++__Vi0) {
        for (int __Vi1=0; __Vi1<2; ++__Vi1) {
            cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q[__Vi0][__Vi1] = VL_RAND_RESET_I(3);
        }
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__saturation_counter = VL_RAND_RESET_I(2);
    VL_RAND_RESET_W(202, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__instr_data_in);
    VL_RAND_RESET_W(202, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__instr_data_out);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__push_instr = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__push_instr_fifo = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__pop_instr = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__instr_queue_full = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__instr_queue_empty = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__pop_address = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__push_address = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__address_overflow = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__idx_is_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__idx_is_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__idx_ds_d = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__idx_ds_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__pc_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__pc_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__reset_address_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__reset_address_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__taken = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__popcount = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__consumed_extended = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__fifo_pos_extended = VL_RAND_RESET_I(4);
    VL_RAND_RESET_W(128, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__instr);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__cf = VL_RAND_RESET_I(12);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT____Vcellout__i_fifo_address__data_o = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT____Vcellinp__i_fifo_address__push_i = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__i_lzc_branch_index__DOT__gen_lzc__DOT__index_lut = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__i_lzc_branch_index__DOT__gen_lzc__DOT__index_nodes = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__i_lzc_branch_index__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__i_fifo_address__DOT__gate_clock = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__i_fifo_address__DOT__read_pointer_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__i_fifo_address__DOT__read_pointer_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__i_fifo_address__DOT__write_pointer_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__i_fifo_address__DOT__write_pointer_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__i_fifo_address__DOT__status_cnt_n = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__i_fifo_address__DOT__status_cnt_q = VL_RAND_RESET_I(3);
    VL_RAND_RESET_W(256, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__i_fifo_address__DOT__mem_n);
    VL_RAND_RESET_W(256, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__i_fifo_address__DOT__mem_q);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__gen_instr_fifo__BRA__0__KET____DOT__i_fifo_instr_data__DOT__gate_clock = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__gen_instr_fifo__BRA__0__KET____DOT__i_fifo_instr_data__DOT__read_pointer_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__gen_instr_fifo__BRA__0__KET____DOT__i_fifo_instr_data__DOT__read_pointer_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__gen_instr_fifo__BRA__0__KET____DOT__i_fifo_instr_data__DOT__write_pointer_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__gen_instr_fifo__BRA__0__KET____DOT__i_fifo_instr_data__DOT__write_pointer_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__gen_instr_fifo__BRA__0__KET____DOT__i_fifo_instr_data__DOT__status_cnt_n = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__gen_instr_fifo__BRA__0__KET____DOT__i_fifo_instr_data__DOT__status_cnt_q = VL_RAND_RESET_I(3);
    VL_RAND_RESET_W(404, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__gen_instr_fifo__BRA__0__KET____DOT__i_fifo_instr_data__DOT__mem_n);
    VL_RAND_RESET_W(404, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__gen_instr_fifo__BRA__0__KET____DOT__i_fifo_instr_data__DOT__mem_q);
    VL_RAND_RESET_W(101, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__gen_instr_fifo__BRA__0__KET____DOT__i_fifo_instr_data__DOT____Vlvbound1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__gen_instr_fifo__BRA__1__KET____DOT__i_fifo_instr_data__DOT__gate_clock = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__gen_instr_fifo__BRA__1__KET____DOT__i_fifo_instr_data__DOT__read_pointer_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__gen_instr_fifo__BRA__1__KET____DOT__i_fifo_instr_data__DOT__read_pointer_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__gen_instr_fifo__BRA__1__KET____DOT__i_fifo_instr_data__DOT__write_pointer_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__gen_instr_fifo__BRA__1__KET____DOT__i_fifo_instr_data__DOT__write_pointer_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__gen_instr_fifo__BRA__1__KET____DOT__i_fifo_instr_data__DOT__status_cnt_n = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__gen_instr_fifo__BRA__1__KET____DOT__i_fifo_instr_data__DOT__status_cnt_q = VL_RAND_RESET_I(3);
    VL_RAND_RESET_W(404, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__gen_instr_fifo__BRA__1__KET____DOT__i_fifo_instr_data__DOT__mem_n);
    VL_RAND_RESET_W(404, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__gen_instr_fifo__BRA__1__KET____DOT__i_fifo_instr_data__DOT__mem_q);
    VL_RAND_RESET_W(101, cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_instr_queue__DOT__gen_instr_fifo__BRA__1__KET____DOT__i_fifo_instr_data__DOT____Vlvbound1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__gen_instr_scan__BRA__0__KET____DOT__i_instr_scan__DOT__is_jal_r = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__gen_instr_scan__BRA__1__KET____DOT__i_instr_scan__DOT__is_jal_r = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(363, cva6_core_only_tb__DOT__i_cva6__DOT__id_stage_i__DOT__issue_n);
    VL_RAND_RESET_W(363, cva6_core_only_tb__DOT__i_cva6__DOT__id_stage_i__DOT__issue_q);
    cva6_core_only_tb__DOT__i_cva6__DOT__id_stage_i__DOT__is_control_flow_instr = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(361, cva6_core_only_tb__DOT__i_cva6__DOT__id_stage_i__DOT__decoded_instruction);
    cva6_core_only_tb__DOT__i_cva6__DOT__id_stage_i__DOT__is_illegal = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__id_stage_i__DOT__instruction = VL_RAND_RESET_I(32);
    cva6_core_only_tb__DOT__i_cva6__DOT__id_stage_i__DOT__is_compressed = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__id_stage_i__DOT__decoder_i__DOT__illegal_instr = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__id_stage_i__DOT__decoder_i__DOT__ecall = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__id_stage_i__DOT__decoder_i__DOT__ebreak = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__id_stage_i__DOT__decoder_i__DOT__check_fprm = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__id_stage_i__DOT__decoder_i__DOT__imm_select = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__id_stage_i__DOT__decoder_i__DOT__imm_i_type = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__id_stage_i__DOT__decoder_i__DOT__imm_s_type = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__id_stage_i__DOT__decoder_i__DOT__imm_sb_type = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__id_stage_i__DOT__decoder_i__DOT__imm_u_type = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__id_stage_i__DOT__decoder_i__DOT__imm_uj_type = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__id_stage_i__DOT__decoder_i__DOT__interrupt_cause = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__rs1_iro_sb = VL_RAND_RESET_I(6);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__rs1_valid_sb_iro = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__rs2_iro_sb = VL_RAND_RESET_I(6);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__rs2_valid_iro_sb = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__rs3_iro_sb = VL_RAND_RESET_I(6);
    VL_RAND_RESET_W(361, cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__issue_instr_rename_sb);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__issue_ack_sb_rename = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(361, cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__issue_instr_sb_iro);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__issue_instr_valid_sb_iro = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__issue_ack_iro_sb = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(722, cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT____Vcellout__i_scoreboard__commit_instr_o);
    VL_RAND_RESET_W(256, cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT____Vcellout__i_scoreboard__rd_clobber_fpr_o);
    VL_RAND_RESET_W(256, cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT____Vcellout__i_scoreboard__rd_clobber_gpr_o);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_re_name__DOT__re_name_table_gpr_n = VL_RAND_RESET_I(32);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_re_name__DOT__re_name_table_gpr_q = VL_RAND_RESET_I(32);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_re_name__DOT__re_name_table_fpr_n = VL_RAND_RESET_I(32);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_re_name__DOT__re_name_table_fpr_q = VL_RAND_RESET_I(32);
    VL_RAND_RESET_W(2904, cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__mem_q);
    VL_RAND_RESET_W(2904, cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__mem_n);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__issue_en = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__issue_cnt_n = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__issue_cnt_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__issue_pointer_n = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__issue_pointer_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__commit_pointer_n = VL_RAND_RESET_I(6);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__commit_pointer_q = VL_RAND_RESET_I(6);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__num_commit = VL_RAND_RESET_I(2);
    VL_RAND_RESET_W(576, cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__gpr_clobber_vld);
    VL_RAND_RESET_W(576, cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__fpr_clobber_vld);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__clobber_fu = VL_RAND_RESET_Q(36);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__rs1_fwd_req = VL_RAND_RESET_I(12);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__rs2_fwd_req = VL_RAND_RESET_I(12);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__rs3_fwd_req = VL_RAND_RESET_I(12);
    VL_RAND_RESET_W(768, cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__rs_data);
    VL_RAND_RESET_W(361, cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT____Vlvbound1);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT____Vlvbound2 = VL_RAND_RESET_I(3);
    VL_RAND_RESET_W(363, cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT____Vlvbound3);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT____Vlvbound5 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT____Vlvbound6 = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT____Vlvbound7 = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(129, cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT____Vlvbound8);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT____Vlvbound9 = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT____Vlvbound10 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT____Vlvbound11 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT____Vlvbound17 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT____Vlvbound18 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT____Vlvbound19 = VL_RAND_RESET_I(4);
    VL_RAND_RESET_W(960, cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__i_sel_rs1__DOT__genblk1__DOT__data_nodes);
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    VL_RAND_RESET_W(960, cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__i_sel_rs2__DOT__genblk1__DOT__data_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__i_sel_rs2__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(15);
    VL_RAND_RESET_W(960, cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__i_sel_rs3__DOT__genblk1__DOT__data_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__i_sel_rs3__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(15);
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    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__gen_sel_clobbers__BRA__59__KET____DOT__i_sel_fpr_clobbers__DOT__genblk1__DOT__data_nodes = VL_RAND_RESET_Q(60);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__gen_sel_clobbers__BRA__59__KET____DOT__i_sel_fpr_clobbers__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(15);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__gen_sel_clobbers__BRA__60__KET____DOT__i_sel_gpr_clobbers__DOT__genblk1__DOT__data_nodes = VL_RAND_RESET_Q(60);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__gen_sel_clobbers__BRA__60__KET____DOT__i_sel_gpr_clobbers__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(15);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__gen_sel_clobbers__BRA__60__KET____DOT__i_sel_fpr_clobbers__DOT__genblk1__DOT__data_nodes = VL_RAND_RESET_Q(60);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__gen_sel_clobbers__BRA__60__KET____DOT__i_sel_fpr_clobbers__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(15);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__gen_sel_clobbers__BRA__61__KET____DOT__i_sel_gpr_clobbers__DOT__genblk1__DOT__data_nodes = VL_RAND_RESET_Q(60);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__gen_sel_clobbers__BRA__61__KET____DOT__i_sel_gpr_clobbers__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(15);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__gen_sel_clobbers__BRA__61__KET____DOT__i_sel_fpr_clobbers__DOT__genblk1__DOT__data_nodes = VL_RAND_RESET_Q(60);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__gen_sel_clobbers__BRA__61__KET____DOT__i_sel_fpr_clobbers__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(15);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__gen_sel_clobbers__BRA__62__KET____DOT__i_sel_gpr_clobbers__DOT__genblk1__DOT__data_nodes = VL_RAND_RESET_Q(60);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__gen_sel_clobbers__BRA__62__KET____DOT__i_sel_gpr_clobbers__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(15);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__gen_sel_clobbers__BRA__62__KET____DOT__i_sel_fpr_clobbers__DOT__genblk1__DOT__data_nodes = VL_RAND_RESET_Q(60);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__gen_sel_clobbers__BRA__62__KET____DOT__i_sel_fpr_clobbers__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(15);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__gen_sel_clobbers__BRA__63__KET____DOT__i_sel_gpr_clobbers__DOT__genblk1__DOT__data_nodes = VL_RAND_RESET_Q(60);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__gen_sel_clobbers__BRA__63__KET____DOT__i_sel_gpr_clobbers__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(15);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__gen_sel_clobbers__BRA__63__KET____DOT__i_sel_fpr_clobbers__DOT__genblk1__DOT__data_nodes = VL_RAND_RESET_Q(60);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_scoreboard__DOT__gen_sel_clobbers__BRA__63__KET____DOT__i_sel_fpr_clobbers__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(15);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__stall = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__operand_a_regfile = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__operand_b_regfile = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__operand_a_n = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__operand_a_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__operand_b_n = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__operand_b_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__imm_n = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__imm_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__alu_valid_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__mult_valid_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__fpu_valid_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__fpu_fmt_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__fpu_rm_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__lsu_valid_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__csr_valid_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__branch_valid_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__trans_id_n = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__trans_id_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__operator_n = VL_RAND_RESET_I(7);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__operator_q = VL_RAND_RESET_I(7);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__fu_n = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__fu_q = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__forward_rs1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__forward_rs2 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__forward_rs3 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__raddr_pack = VL_RAND_RESET_I(10);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__waddr_pack = VL_RAND_RESET_I(10);
    VL_RAND_RESET_W(128, cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__wdata_pack);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__we_pack = VL_RAND_RESET_I(2);
    VL_RAND_RESET_W(128, cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT____Vcellout__i_ariane_regfile__rdata_o);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__fp_raddr_pack = VL_RAND_RESET_I(15);
    VL_RAND_RESET_W(192, cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT____Vcellout__float_regfile_gen__DOT__i_ariane_fp_regfile__rdata_o);
    VL_RAND_RESET_W(2048, cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__i_ariane_regfile__DOT__mem);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__i_ariane_regfile__DOT__we_dec = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(2048, cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__float_regfile_gen__DOT__i_ariane_fp_regfile__DOT__mem);
    cva6_core_only_tb__DOT__i_cva6__DOT__issue_stage_i__DOT__i_issue_read_operands__DOT__float_regfile_gen__DOT__i_ariane_fp_regfile__DOT__we_dec = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__current_instruction_is_sfence_vma = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__asid_to_be_flushed = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__vaddr_to_be_flushed = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__alu_branch_res = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__alu_result = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__branch_result = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__csr_ready = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__mult_ready = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__mult_valid = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(206, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__alu_data);
    VL_RAND_RESET_W(206, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__mult_data);
    VL_RAND_RESET_W(206, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_data);
    VL_RAND_RESET_W(402, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT____Vcellout__lsu_i__dcache_req_ports_o);
    VL_RAND_RESET_W(206, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_data);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__alu_i__DOT__operand_a_rev = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__alu_i__DOT__operand_a_rev32 = VL_RAND_RESET_I(32);
    VL_RAND_RESET_W(66, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__alu_i__DOT__adder_result_ext_o);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__alu_i__DOT__less = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__alu_i__DOT__adder_op_b_negate = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__alu_i__DOT__shift_left = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__alu_i__DOT__shift_arithmetic = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__alu_i__DOT__shift_op_a = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__alu_i__DOT__shift_result = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__alu_i__DOT__shift_result32 = VL_RAND_RESET_I(32);
    VL_RAND_RESET_W(65, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__alu_i__DOT__shift_right_result);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__alu_i__DOT__shift_right_result32 = VL_RAND_RESET_Q(33);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__alu_i__DOT__shift_left_result = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__alu_i__DOT__shift_left_result32 = VL_RAND_RESET_I(32);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__alu_i__DOT__unnamedblk1__DOT__sgn = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__branch_unit_i__DOT__target_address = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__branch_unit_i__DOT__next_pc = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__branch_unit_i__DOT__mispredict_handler__DOT__jump_base = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__csr_buffer_i__DOT__csr_reg_n = VL_RAND_RESET_I(13);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__csr_buffer_i__DOT__csr_reg_q = VL_RAND_RESET_I(13);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__div_valid = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__mul_result = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__div_result = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__div_valid_op = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__operand_b = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__operand_a = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__div_signed = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__word_op_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__word_op_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT____Vcellinp__i_div__opcode_i = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_multiplier__DOT__trans_id_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_multiplier__DOT__mult_valid_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_multiplier__DOT__operator_q = VL_RAND_RESET_I(7);
    VL_RAND_RESET_W(128, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_multiplier__DOT__mult_result_q);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_multiplier__DOT__sign_a = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_multiplier__DOT__sign_b = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__state_d = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__state_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__res_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__res_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__op_a_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__op_a_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__op_b_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__op_b_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__op_b_zero_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__op_b_zero_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__id_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__id_d = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__rem_sel_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__rem_sel_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__comp_inv_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__comp_inv_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__res_inv_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__res_inv_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__add_mux = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__add_tmp = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__out_mux = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__cnt_q = VL_RAND_RESET_I(7);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__cnt_d = VL_RAND_RESET_I(7);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__lzc_a_input = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__lzc_b_input = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__div_shift = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__a_reg_en = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__b_reg_en = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__res_reg_en = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__ab_comp = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__load_en = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__div_res_zero_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__div_res_zero_q = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__i_lzc_a__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__i_lzc_a__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__i_lzc_a__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__i_lzc_a__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__i_lzc_b__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__i_lzc_b__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__i_lzc_b__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__i_mult__DOT__i_div__DOT__i_lzc_b__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__data_misaligned = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(152, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__lsu_ctrl);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__pop_st = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__pop_ld = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__vaddr_xlen = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__be_i = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__st_valid_i = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__ld_valid_i = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__ld_translation_req = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__st_translation_req = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__translation_req = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__mmu_vaddr = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__mmu_paddr = VL_RAND_RESET_Q(56);
    VL_RAND_RESET_W(129, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__mmu_exception);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__dtlb_hit = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__dtlb_ppn = VL_RAND_RESET_Q(44);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__ld_valid = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__ld_trans_id = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__ld_result = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__st_valid = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__page_offset_matches = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(129, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__misaligned_exception);
    VL_RAND_RESET_W(129, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__ld_ex);
    VL_RAND_RESET_W(134, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT____Vcellout__i_mmu__req_port_o);
    VL_RAND_RESET_W(134, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT____Vcellout__i_store_unit__req_port_o);
    VL_RAND_RESET_W(134, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT____Vcellout__i_load_unit__req_port_o);
    VL_RAND_RESET_W(197, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT____Vcellout__i_pipe_reg_load__d_o);
    VL_RAND_RESET_W(197, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT____Vcellinp__i_pipe_reg_store__d_i);
    VL_RAND_RESET_W(152, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__lsu_req_i);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__iaccess_err = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__daccess_err = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__ptw_error = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__ptw_access_exception = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__ptw_bad_paddr = VL_RAND_RESET_Q(56);
    VL_RAND_RESET_W(110, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__update_ptw_itlb);
    VL_RAND_RESET_W(110, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__update_ptw_dtlb);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__itlb_content = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__itlb_is_2M = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__itlb_is_1G = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__itlb_lu_hit = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__dtlb_content = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__dtlb_is_2M = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__dtlb_is_1G = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__dtlb_lu_hit = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__match_any_execute_region = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__pmp_instr_allow = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__lsu_vaddr_n = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__lsu_vaddr_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__dtlb_pte_q = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(129, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__misaligned_ex_n);
    VL_RAND_RESET_W(129, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__misaligned_ex_q);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__lsu_req_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__lsu_is_store_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__dtlb_hit_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__dtlb_is_2M_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__dtlb_is_1G_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__pmp_data_allow = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(736, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_itlb__DOT__tags_q);
    VL_RAND_RESET_W(736, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_itlb__DOT__tags_n);
    VL_RAND_RESET_W(1024, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_itlb__DOT__content_q);
    VL_RAND_RESET_W(1024, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_itlb__DOT__content_n);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_itlb__DOT__vpn0 = VL_RAND_RESET_I(9);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_itlb__DOT__vpn1 = VL_RAND_RESET_I(9);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_itlb__DOT__vpn2 = VL_RAND_RESET_I(9);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_itlb__DOT__lu_hit = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_itlb__DOT__replace_en = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_itlb__DOT__vaddr_vpn0_match = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_itlb__DOT__vaddr_vpn1_match = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_itlb__DOT__vaddr_vpn2_match = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_itlb__DOT__plru_tree_q = VL_RAND_RESET_I(30);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_itlb__DOT__plru_tree_n = VL_RAND_RESET_I(30);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_itlb__DOT__plru_replacement__DOT__unnamedblk6__DOT__unnamedblk7__DOT__en = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_itlb__DOT____Vlvbound5 = VL_RAND_RESET_Q(46);
    VL_RAND_RESET_W(736, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_dtlb__DOT__tags_q);
    VL_RAND_RESET_W(736, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_dtlb__DOT__tags_n);
    VL_RAND_RESET_W(1024, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_dtlb__DOT__content_q);
    VL_RAND_RESET_W(1024, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_dtlb__DOT__content_n);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_dtlb__DOT__vpn0 = VL_RAND_RESET_I(9);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_dtlb__DOT__vpn1 = VL_RAND_RESET_I(9);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_dtlb__DOT__vpn2 = VL_RAND_RESET_I(9);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_dtlb__DOT__lu_hit = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_dtlb__DOT__replace_en = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_dtlb__DOT__vaddr_vpn0_match = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_dtlb__DOT__vaddr_vpn1_match = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_dtlb__DOT__vaddr_vpn2_match = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_dtlb__DOT__plru_tree_q = VL_RAND_RESET_I(30);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_dtlb__DOT__plru_tree_n = VL_RAND_RESET_I(30);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_dtlb__DOT__plru_replacement__DOT__unnamedblk6__DOT__unnamedblk7__DOT__en = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_dtlb__DOT____Vlvbound5 = VL_RAND_RESET_Q(46);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__data_rvalid_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__data_rdata_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__state_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__state_d = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__ptw_lvl_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__ptw_lvl_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__is_instr_ptw_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__is_instr_ptw_n = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__global_mapping_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__global_mapping_n = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__tag_valid_n = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__tag_valid_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__kill_req_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__kill_req_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__tlb_update_asid_q = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__tlb_update_asid_n = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__vaddr_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__vaddr_n = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__ptw_pptr_q = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__ptw_pptr_n = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__allow_access = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__match = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__unnamedblk1__DOT__i = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__match = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__unnamedblk1__DOT__i = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__match = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT____Vcellout__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__match_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__unnamedblk1__DOT__i = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__base = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__mask = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__unnamedblk1__DOT__size = 0;
    VL_RAND_RESET_W(336, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__state_d = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__state_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__st_ready = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__st_valid = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__st_valid_without_flush = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__instr_is_amo = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__st_data_n = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__st_data_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__st_be_n = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__st_be_q = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__st_data_size_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__st_data_size_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__amo_op_d = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__amo_op_q = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__trans_id_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__store_buffer_valid = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__amo_buffer_valid = VL_RAND_RESET_I(1);
    for (int __Vi0=0; __Vi0<4; ++__Vi0) {
        VL_RAND_RESET_W(131, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__store_buffer_i__DOT__speculative_queue_n[__Vi0]);
    }
    for (int __Vi0=0; __Vi0<4; ++__Vi0) {
        VL_RAND_RESET_W(131, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__store_buffer_i__DOT__speculative_queue_q[__Vi0]);
    }
    for (int __Vi0=0; __Vi0<4; ++__Vi0) {
        VL_RAND_RESET_W(131, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__store_buffer_i__DOT__commit_queue_n[__Vi0]);
    }
    for (int __Vi0=0; __Vi0<4; ++__Vi0) {
        VL_RAND_RESET_W(131, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__store_buffer_i__DOT__commit_queue_q[__Vi0]);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__store_buffer_i__DOT__speculative_status_cnt_n = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__store_buffer_i__DOT__speculative_status_cnt_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__store_buffer_i__DOT__commit_status_cnt_n = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__store_buffer_i__DOT__commit_status_cnt_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__store_buffer_i__DOT__speculative_read_pointer_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__store_buffer_i__DOT__speculative_read_pointer_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__store_buffer_i__DOT__speculative_write_pointer_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__store_buffer_i__DOT__speculative_write_pointer_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__store_buffer_i__DOT__commit_read_pointer_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__store_buffer_i__DOT__commit_read_pointer_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__store_buffer_i__DOT__commit_write_pointer_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__store_buffer_i__DOT__commit_write_pointer_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__store_buffer_i__DOT__core_if__DOT__speculative_status_cnt = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__store_buffer_i__DOT__store_if__DOT__commit_status_cnt = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__store_buffer_i__DOT__address_checker__DOT__unnamedblk2__DOT__i = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__store_buffer_i__DOT__address_checker__DOT__unnamedblk3__DOT__i = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__i_amo_buffer__DOT__flush_amo_buffer = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(126, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__i_amo_buffer__DOT__amo_data_in);
    VL_RAND_RESET_W(126, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__i_amo_buffer__DOT____Vcellout__i_amo_fifo__data_o);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__i_amo_buffer__DOT__i_amo_fifo__DOT__gate_clock = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__i_amo_buffer__DOT__i_amo_fifo__DOT__read_pointer_n = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__i_amo_buffer__DOT__i_amo_fifo__DOT__read_pointer_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__i_amo_buffer__DOT__i_amo_fifo__DOT__write_pointer_n = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__i_amo_buffer__DOT__i_amo_fifo__DOT__write_pointer_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__i_amo_buffer__DOT__i_amo_fifo__DOT__status_cnt_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__i_amo_buffer__DOT__i_amo_fifo__DOT__status_cnt_q = VL_RAND_RESET_I(2);
    VL_RAND_RESET_W(126, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__i_amo_buffer__DOT__i_amo_fifo__DOT__mem_n);
    VL_RAND_RESET_W(126, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__i_amo_buffer__DOT__i_amo_fifo__DOT__mem_q);
    VL_RAND_RESET_W(126, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_store_unit__DOT__i_amo_buffer__DOT__i_amo_fifo__DOT____Vlvbound1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_load_unit__DOT__state_d = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_load_unit__DOT__state_q = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_load_unit__DOT__load_data_d = VL_RAND_RESET_I(13);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_load_unit__DOT__load_data_q = VL_RAND_RESET_I(13);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_load_unit__DOT__paddr_ni = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_load_unit__DOT__stall_ni = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_load_unit__DOT__shifted_data = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_load_unit__DOT__idx_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_load_unit__DOT__sign_bit = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_load_unit__DOT__signed_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_load_unit__DOT__fp_sign_q = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(304, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__lsu_bypass_i__DOT__mem_n);
    VL_RAND_RESET_W(304, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__lsu_bypass_i__DOT__mem_q);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__lsu_bypass_i__DOT__read_pointer_n = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__lsu_bypass_i__DOT__read_pointer_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__lsu_bypass_i__DOT__write_pointer_n = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__lsu_bypass_i__DOT__write_pointer_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__lsu_bypass_i__DOT__status_cnt_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__lsu_bypass_i__DOT__status_cnt_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__lsu_bypass_i__DOT__unnamedblk1__DOT__status_cnt = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__lsu_bypass_i__DOT__unnamedblk1__DOT__write_pointer = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__lsu_bypass_i__DOT__unnamedblk1__DOT__read_pointer = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(152, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__lsu_bypass_i__DOT____Vlvbound1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__lsu_bypass_i__DOT____Vlvbound2 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__lsu_bypass_i__DOT____Vlvbound3 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__state_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__state_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__operand_a_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__operand_b_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__operand_b_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__operand_c_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__operand_c_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_op_d = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_op_q = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_op = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_op_mod_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_op_mod_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_srcfmt_d = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_srcfmt_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_srcfmt = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_dstfmt_d = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_dstfmt_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_dstfmt = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_rm_d = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_rm_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_vec_op_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_vec_op_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_vec_op = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_tag_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_in_ready = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_in_valid = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__hold_inputs = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__use_hold = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__input_translation__DOT__vec_replication = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__input_translation__DOT__replicate_c = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__input_translation__DOT__check_ah = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(192, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_operands);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__opgrp_in_ready = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__opgrp_out_valid = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__opgrp_out_ready = VL_RAND_RESET_I(4);
    VL_RAND_RESET_W(288, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__opgrp_outputs);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__is_boxed = VL_RAND_RESET_I(15);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__in_valid = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__input_boxed = VL_RAND_RESET_I(15);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__in_valid = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__in_valid = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__in_valid = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT____Vlvbound1 = VL_RAND_RESET_I(3);
    VL_RAND_RESET_W(216, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__i_arbiter__DOT__genblk1__DOT__data_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__i_arbiter__DOT__genblk1__DOT__gnt_nodes = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__i_arbiter__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__i_arbiter__DOT__genblk1__DOT__rr_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__i_arbiter__DOT__genblk1__DOT__gen_int_rr__DOT__rr_d = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__0__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__1__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__1__KET____DOT__gen_level__BRA__1__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__fmt_in_ready = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__fmt_out_valid = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__fmt_out_ready = VL_RAND_RESET_I(5);
    VL_RAND_RESET_W(365, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__fmt_outputs);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT____Vcellout__gen_merged_slice__DOT__i_multifmt_slice__status_o = VL_RAND_RESET_I(5);
    VL_RAND_RESET_W(511, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__data_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gnt_nodes = VL_RAND_RESET_I(7);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(7);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__rr_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_int_rr__DOT__rr_d = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__0__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__1__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__1__KET____DOT__gen_level__BRA__1__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__2__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__2__KET____DOT__gen_level__BRA__1__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__lane_in_ready = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__lane_out_valid = VL_RAND_RESET_I(8);
    VL_RAND_RESET_W(320, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__fmt_slice_result);
    VL_RAND_RESET_W(256, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__ifmt_slice_result);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__lane_status = VL_RAND_RESET_Q(40);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__lane_ext_bit = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__lane_tags = VL_RAND_RESET_I(24);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__lane_aux = VL_RAND_RESET_Q(40);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__local_result = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__local_operands = VL_RAND_RESET_Q(48);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__1__KET____DOT__local_result = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__2__KET____DOT__local_result = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__3__KET____DOT__local_result = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__output_processing__DOT__temp_status = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT____Vlvbound3 = VL_RAND_RESET_I(16);
    VL_RAND_RESET_W(96, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__inp_pipe_operands_q);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__inp_pipe_is_boxed_q = VL_RAND_RESET_I(30);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__inp_pipe_rnd_mode_q = VL_RAND_RESET_I(6);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__inp_pipe_op_q = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__inp_pipe_op_mod_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__inp_pipe_src_fmt_q = VL_RAND_RESET_I(6);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__inp_pipe_dst_fmt_q = VL_RAND_RESET_I(6);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__inp_pipe_tag_q = VL_RAND_RESET_I(6);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__inp_pipe_aux_q = VL_RAND_RESET_I(10);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__inp_pipe_valid_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__inp_pipe_ready = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__fmt_sign = VL_RAND_RESET_I(15);
    VL_RAND_RESET_W(120, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__fmt_exponent);
    VL_RAND_RESET_W(105, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__fmt_mantissa);
    VL_RAND_RESET_W(120, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__info_q);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__operand_a = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__operand_b = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__operand_c = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__info_a = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__info_b = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__info_c = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__any_operand_inf = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__any_operand_nan = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__signalling_nan = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__effective_subtraction = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__tentative_sign = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(80, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__fmt_special_result);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__fmt_special_status = VL_RAND_RESET_I(25);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__fmt_result_is_special = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__exponent_addend = VL_RAND_RESET_I(10);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__exponent_product = VL_RAND_RESET_I(10);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__exponent_difference = VL_RAND_RESET_I(10);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__addend_shamt = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__mantissa_c = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__addend_after_shift = VL_RAND_RESET_I(28);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__addend_sticky_bits = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__sum_raw = VL_RAND_RESET_I(29);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__mid_pipe_eff_sub_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__mid_pipe_exp_prod_q = VL_RAND_RESET_I(20);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__mid_pipe_exp_diff_q = VL_RAND_RESET_I(20);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__mid_pipe_tent_exp_q = VL_RAND_RESET_I(20);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__mid_pipe_add_shamt_q = VL_RAND_RESET_I(10);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__mid_pipe_sticky_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__mid_pipe_sum_q = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__mid_pipe_final_sign_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__mid_pipe_rnd_mode_q = VL_RAND_RESET_I(6);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__mid_pipe_dst_fmt_q = VL_RAND_RESET_I(6);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__mid_pipe_res_is_spec_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__mid_pipe_spec_res_q = VL_RAND_RESET_I(32);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__mid_pipe_spec_stat_q = VL_RAND_RESET_I(10);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__mid_pipe_tag_q = VL_RAND_RESET_I(6);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__mid_pipe_aux_q = VL_RAND_RESET_I(10);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__mid_pipe_valid_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__mid_pipe_ready = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__normalized_exponent = VL_RAND_RESET_I(10);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__sum_shifted = VL_RAND_RESET_I(29);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__final_mantissa = VL_RAND_RESET_I(9);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__sum_sticky_bits = VL_RAND_RESET_I(19);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__sticky_after_norm = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__final_exponent = VL_RAND_RESET_I(10);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__pre_round_abs = VL_RAND_RESET_I(15);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__round_sticky_bits = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__of_before_round = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__of_after_round = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(75, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__fmt_pre_round_abs);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__fmt_round_sticky_bits = VL_RAND_RESET_I(10);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__fmt_of_after_round = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__fmt_uf_after_round = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__rounded_sign = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__rounded_abs = VL_RAND_RESET_I(15);
    VL_RAND_RESET_W(80, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__fmt_result);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__regular_status = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__gen_input_pipeline__BRA__0__KET____DOT__reg_ena = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__fmt_init_inputs__BRA__0__KET____DOT__active_format__DOT__trimmed_ops = VL_RAND_RESET_Q(48);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT____Vcellout__fmt_init_inputs__BRA__0__KET____DOT__active_format__DOT__i_fpnew_classifier__info_o = VL_RAND_RESET_I(24);
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    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT____Vcellout__fmt_init_inputs__BRA__1__KET____DOT__active_format__DOT__i_fpnew_classifier__info_o = VL_RAND_RESET_I(24);
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    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__gen_special_results__BRA__1__KET____DOT__active_format__DOT__special_results__DOT__special_res = VL_RAND_RESET_I(8);
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    VL_RAND_RESET_W(95, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_I(32);
    VL_RAND_RESET_W(160, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_I(19);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__i_lzc__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__fmt_init_inputs__BRA__0__KET____DOT__active_format__DOT__i_fpnew_classifier__DOT__gen_num_values__BRA__0__KET____DOT__value = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__fmt_init_inputs__BRA__0__KET____DOT__active_format__DOT__i_fpnew_classifier__DOT__gen_num_values__BRA__0__KET____DOT__is_boxed = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__fmt_init_inputs__BRA__0__KET____DOT__active_format__DOT__i_fpnew_classifier__DOT__gen_num_values__BRA__0__KET____DOT__is_normal = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__fmt_init_inputs__BRA__0__KET____DOT__active_format__DOT__i_fpnew_classifier__DOT__gen_num_values__BRA__0__KET____DOT__is_inf = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__fmt_init_inputs__BRA__0__KET____DOT__active_format__DOT__i_fpnew_classifier__DOT__gen_num_values__BRA__0__KET____DOT__is_nan = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__fmt_init_inputs__BRA__0__KET____DOT__active_format__DOT__i_fpnew_classifier__DOT__gen_num_values__BRA__0__KET____DOT__is_signalling = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__fmt_init_inputs__BRA__0__KET____DOT__active_format__DOT__i_fpnew_classifier__DOT__gen_num_values__BRA__0__KET____DOT__is_quiet = VL_RAND_RESET_I(1);
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    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__fmt_init_inputs__BRA__0__KET____DOT__active_format__DOT__i_fpnew_classifier__DOT__gen_num_values__BRA__0__KET____DOT__is_subnormal = VL_RAND_RESET_I(1);
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    VL_RAND_RESET_W(511, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__data_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(7);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__rr_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_int_rr__DOT__rr_d = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__0__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__1__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__1__KET____DOT__gen_level__BRA__1__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__2__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__2__KET____DOT__gen_level__BRA__1__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_in_ready = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__slice_vec_class_result = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_ext_bit = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_class_mask = VL_RAND_RESET_I(10);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_tags = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_vectorial = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_is_class = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__local_sign = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__out_valid = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__op_result = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__op_status = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__output_processing__DOT__temp_status = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_in_ready = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__slice_vec_class_result = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_ext_bit = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_class_mask = VL_RAND_RESET_I(10);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_tags = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_vectorial = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_is_class = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__local_sign = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__out_valid = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__op_result = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__op_status = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__output_processing__DOT__temp_status = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__fmt_in_ready = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__fmt_out_valid = VL_RAND_RESET_I(5);
    VL_RAND_RESET_W(365, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__fmt_outputs);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT____Vcellout__gen_merged_slice__DOT__i_multifmt_slice__status_o = VL_RAND_RESET_I(5);
    VL_RAND_RESET_W(511, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__data_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(7);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__rr_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_int_rr__DOT__rr_d = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__0__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__1__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__1__KET____DOT__gen_level__BRA__1__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__2__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__2__KET____DOT__gen_level__BRA__1__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__lane_in_ready = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__lane_out_valid = VL_RAND_RESET_I(8);
    VL_RAND_RESET_W(320, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__fmt_slice_result);
    VL_RAND_RESET_W(256, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__ifmt_slice_result);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__lane_status = VL_RAND_RESET_Q(40);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__lane_ext_bit = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__lane_tags = VL_RAND_RESET_I(24);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__lane_aux = VL_RAND_RESET_Q(40);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__local_result = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__out_valid = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__op_result = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__op_status = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__1__KET____DOT__local_result = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__2__KET____DOT__local_result = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__3__KET____DOT__local_result = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__output_processing__DOT__temp_status = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__fmt_in_ready = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__fmt_out_valid = VL_RAND_RESET_I(5);
    VL_RAND_RESET_W(365, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__fmt_outputs);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT____Vcellout__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__status_o = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT____Vcellout__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__status_o = VL_RAND_RESET_I(5);
    VL_RAND_RESET_W(511, cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__data_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(7);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__rr_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_int_rr__DOT__rr_d = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__0__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__1__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__1__KET____DOT__gen_level__BRA__1__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__2__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gen_levels__BRA__2__KET____DOT__gen_level__BRA__1__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_in_ready = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__slice_vec_class_result = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_ext_bit = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_class_mask = VL_RAND_RESET_I(10);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_tags = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_vectorial = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_is_class = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__local_sign = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__out_valid = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__op_result = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__op_status = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__0__KET____DOT__active_format__DOT__i_fmt_slice__DOT__output_processing__DOT__temp_status = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_in_ready = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__slice_vec_class_result = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_ext_bit = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_class_mask = VL_RAND_RESET_I(10);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_tags = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_vectorial = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__lane_is_class = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__local_sign = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__out_valid = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__op_result = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__op_status = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__gen_parallel_slices__BRA__1__KET____DOT__active_format__DOT__i_fmt_slice__DOT__output_processing__DOT__temp_status = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__commit_stage_i__DOT__instr_0_is_amo = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__read_access_exception = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__update_access_exception = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__privilege_violation = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__csr_we = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__csr_read = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__csr_wdata = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__csr_rdata = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__trap_to_priv_lvl = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__en_ld_st_translation_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mprv = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mret = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__sret = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__dret = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__dirty_fp_state_csr = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mstatus_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mstatus_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__satp_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__satp_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__dcsr_q = VL_RAND_RESET_I(32);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__dcsr_d = VL_RAND_RESET_I(32);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__priv_lvl_d = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__priv_lvl_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__debug_mode_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__debug_mode_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mtvec_rst_load_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__dpc_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__dpc_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__dscratch0_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__dscratch0_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__dscratch1_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__dscratch1_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mtvec_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mtvec_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__medeleg_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__medeleg_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mideleg_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mideleg_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mip_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mip_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mie_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mie_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mcounteren_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mcounteren_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mscratch_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mscratch_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mepc_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mepc_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mcause_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mcause_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mtval_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mtval_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__stvec_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__stvec_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__scounteren_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__scounteren_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__sscratch_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__sscratch_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__sepc_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__sepc_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__scause_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__scause_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__stval_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__stval_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__dcache_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__dcache_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__icache_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__icache_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__wfi_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__wfi_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__cycle_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__cycle_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__instret_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__instret_d = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(128, cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__pmpcfg_q);
    VL_RAND_RESET_W(128, cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__pmpcfg_d);
    VL_RAND_RESET_W(864, cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__pmpaddr_q);
    VL_RAND_RESET_W(864, cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__pmpaddr_d);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__fcsr_q = VL_RAND_RESET_I(32);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__fcsr_d = VL_RAND_RESET_I(32);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__mask = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__csr_update__DOT__satp = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__csr_update__DOT__instret = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT____Vlvbound1 = VL_RAND_RESET_Q(54);
    VL_RAND_RESET_W(896, cva6_core_only_tb__DOT__i_cva6__DOT__i_perf_counters__DOT__perf_counter_d);
    VL_RAND_RESET_W(896, cva6_core_only_tb__DOT__i_cva6__DOT__i_perf_counters__DOT__perf_counter_q);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_perf_counters__DOT____Vlvbound1 = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__controller_i__DOT__fence_active_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__controller_i__DOT__fence_active_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__icache_adapter_data_req = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__adapter_icache_data_ack = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__icache_adapter = VL_RAND_RESET_Q(61);
    VL_RAND_RESET_W(148, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__adapter_icache);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__dcache_adapter_data_req = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__adapter_dcache_data_ack = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(135, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__dcache_adapter);
    VL_RAND_RESET_W(150, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__adapter_dcache);
    VL_RAND_RESET_W(198, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT____Vcellout__i_wt_dcache__req_ports_o);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__cache_en_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__cache_en_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__vaddr_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__vaddr_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__paddr_is_nc = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__cl_hit = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__cache_rden = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__cache_wren = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__cmp_en_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__cmp_en_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__flush_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__flush_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__repl_way = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__repl_way_oh_d = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__repl_way_oh_q = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__inv_en = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__inv_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__flush_en = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__flush_cnt_d = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__flush_cnt_q = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__cl_req = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__cl_offset_d = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__cl_offset_q = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__cl_tag_d = VL_RAND_RESET_Q(44);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__cl_tag_q = VL_RAND_RESET_Q(44);
    for (int __Vi0=0; __Vi0<4; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__cl_tag_rdata[__Vi0] = VL_RAND_RESET_Q(44);
    }
    for (int __Vi0=0; __Vi0<4; ++__Vi0) {
        VL_RAND_RESET_W(128, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__cl_rdata[__Vi0]);
    }
    VL_RAND_RESET_W(128, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__cl_sel);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__vld_req = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__vld_we = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__vld_rdata = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__vld_addr = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__state_d = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__state_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__addr_ni = VL_RAND_RESET_I(1);
    for (int __Vi0=0; __Vi0<4; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__cl_tag_valid_rdata[__Vi0] = VL_RAND_RESET_Q(45);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__i_lzc__DOT__gen_lzc__DOT__index_lut = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__i_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__i_lfsr__DOT__shift_d = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__i_lfsr__DOT__shift_q = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__i_lfsr__DOT__unnamedblk1__DOT__shift_in = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__i_lzc_hit__DOT__gen_lzc__DOT__index_lut = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__i_lzc_hit__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__i_lzc_hit__DOT__gen_lzc__DOT__index_nodes = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__i_lzc_hit__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__0__KET____DOT__tag_sram__DOT__wdata_aligned = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__0__KET____DOT__tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__0__KET____DOT__tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__0__KET____DOT__tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    VL_RAND_RESET_W(128, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__0__KET____DOT__data_sram__DOT__rdata_aligned);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__0__KET____DOT__data_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__0__KET____DOT__data_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__0__KET____DOT__data_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__0__KET____DOT__data_sram__DOT__gen_cut__BRA__1__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__0__KET____DOT__data_sram__DOT__gen_cut__BRA__1__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__0__KET____DOT__data_sram__DOT__gen_cut__BRA__1__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__1__KET____DOT__tag_sram__DOT__wdata_aligned = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__1__KET____DOT__tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__1__KET____DOT__tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__1__KET____DOT__tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    VL_RAND_RESET_W(128, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__1__KET____DOT__data_sram__DOT__rdata_aligned);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__1__KET____DOT__data_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__1__KET____DOT__data_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__1__KET____DOT__data_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__1__KET____DOT__data_sram__DOT__gen_cut__BRA__1__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__1__KET____DOT__data_sram__DOT__gen_cut__BRA__1__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__1__KET____DOT__data_sram__DOT__gen_cut__BRA__1__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__2__KET____DOT__tag_sram__DOT__wdata_aligned = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__2__KET____DOT__tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__2__KET____DOT__tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__2__KET____DOT__tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    VL_RAND_RESET_W(128, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__2__KET____DOT__data_sram__DOT__rdata_aligned);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__2__KET____DOT__data_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__2__KET____DOT__data_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__2__KET____DOT__data_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__2__KET____DOT__data_sram__DOT__gen_cut__BRA__1__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__2__KET____DOT__data_sram__DOT__gen_cut__BRA__1__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__2__KET____DOT__data_sram__DOT__gen_cut__BRA__1__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__3__KET____DOT__tag_sram__DOT__wdata_aligned = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__3__KET____DOT__tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__3__KET____DOT__tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__3__KET____DOT__tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    VL_RAND_RESET_W(128, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__3__KET____DOT__data_sram__DOT__rdata_aligned);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__3__KET____DOT__data_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__3__KET____DOT__data_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__3__KET____DOT__data_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__3__KET____DOT__data_sram__DOT__gen_cut__BRA__1__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__3__KET____DOT__data_sram__DOT__gen_cut__BRA__1__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__gen_sram__BRA__3__KET____DOT__data_sram__DOT__gen_cut__BRA__1__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__wr_cl_vld = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__wr_cl_we = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__wr_cl_idx = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__wr_vld_bits = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__wr_req = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__wr_ack = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__wr_data = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__wr_data_be = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__miss_req = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__miss_ack = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__miss_nc = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__miss_we = VL_RAND_RESET_I(3);
    VL_RAND_RESET_W(192, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__miss_wdata);
    VL_RAND_RESET_W(168, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__miss_paddr);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__miss_vld_bits = VL_RAND_RESET_I(24);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__miss_size = VL_RAND_RESET_I(9);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__miss_id = VL_RAND_RESET_I(6);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__miss_replay = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__miss_rtrn_vld = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__rd_prio = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__rd_tag_only = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__rd_req = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__rd_ack = VL_RAND_RESET_I(3);
    VL_RAND_RESET_W(132, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__rd_tag);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__rd_idx = VL_RAND_RESET_I(24);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__rd_off = VL_RAND_RESET_I(12);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__rd_data = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__rd_vld_bits = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__rd_hit_oh = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__tx_vld = VL_RAND_RESET_I(4);
    VL_RAND_RESET_W(224, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT____Vcellout__i_wt_dcache_wbuffer__tx_paddr_o);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT____Vcellout__i_wt_dcache_wbuffer__miss_size_o = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT____Vcellout__i_wt_dcache_wbuffer__miss_paddr_o = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT____Vcellout__i_wt_dcache_wbuffer__miss_wdata_o = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT____Vcellout__i_wt_dcache_wbuffer__miss_req_o = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(66, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT____Vcellout__i_wt_dcache_wbuffer__req_port_o);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT____Vcellout__gen_rd_ports__BRA__0__KET____DOT__i_wt_dcache_ctrl__rd_req_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT____Vcellout__gen_rd_ports__BRA__0__KET____DOT__i_wt_dcache_ctrl__miss_nc_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT____Vcellout__gen_rd_ports__BRA__0__KET____DOT__i_wt_dcache_ctrl__miss_req_o = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(66, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT____Vcellout__gen_rd_ports__BRA__0__KET____DOT__i_wt_dcache_ctrl__req_port_o);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT____Vcellout__gen_rd_ports__BRA__1__KET____DOT__i_wt_dcache_ctrl__rd_req_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT____Vcellout__gen_rd_ports__BRA__1__KET____DOT__i_wt_dcache_ctrl__miss_nc_o = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT____Vcellout__gen_rd_ports__BRA__1__KET____DOT__i_wt_dcache_ctrl__miss_req_o = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(66, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT____Vcellout__gen_rd_ports__BRA__1__KET____DOT__i_wt_dcache_ctrl__req_port_o);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__state_d = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__state_q = VL_RAND_RESET_I(3);
    VL_RAND_RESET_W(75, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__mshr_d);
    VL_RAND_RESET_W(75, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__mshr_q);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__repl_way = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__mshr_vld_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__mshr_vld_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__mshr_vld_q1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__mshr_allocate = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__update_lfsr = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__enable_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__enable_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__flush_en = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__mask_reads = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__lock_reqs = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__amo_sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__miss_is_write = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__amo_req_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__cnt_d = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__cnt_q = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__miss_req_masked_d = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__miss_req_masked_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__inv_vld = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__inv_vld_all = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__cl_write_en = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__load_ack = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__store_ack = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__amo_ack = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__mshr_rdrd_collision_d = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__mshr_rdrd_collision_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__mshr_rdrd_collision = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__tx_rdwr_collision = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__mshr_rdwr_collision = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT____Vcellinp__i_lzc_inv__in_i = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__sc_fail = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__sc_pass = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__store_sent = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__stores_inflight_d = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__stores_inflight_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT____Vlvbound2 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT____Vlvbound3 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__i_lzc_reqs__DOT__gen_lzc__DOT__index_lut = VL_RAND_RESET_I(6);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__i_lzc_reqs__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__i_lzc_reqs__DOT__gen_lzc__DOT__index_nodes = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__i_lzc_reqs__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__i_lzc_reqs__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__i_lzc_inv__DOT__gen_lzc__DOT__index_lut = VL_RAND_RESET_I(24);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__i_lzc_inv__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__i_lzc_inv__DOT__gen_lzc__DOT__index_nodes = VL_RAND_RESET_I(24);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__i_lzc_inv__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__i_lfsr_inv__DOT__shift_d = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__i_lfsr_inv__DOT__shift_q = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__i_lfsr_inv__DOT__unnamedblk1__DOT__shift_in = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__i_exp_backoff__DOT__lfsr_d = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__i_exp_backoff__DOT__lfsr_q = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__i_exp_backoff__DOT__cnt_d = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__i_exp_backoff__DOT__cnt_q = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__i_exp_backoff__DOT__mask_d = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__i_exp_backoff__DOT__mask_q = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__tx_stat_d = VL_RAND_RESET_Q(48);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__tx_stat_q = VL_RAND_RESET_Q(48);
    VL_RAND_RESET_W(1224, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__wbuffer_d);
    VL_RAND_RESET_W(1224, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__wbuffer_q);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__valid = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__dirty = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__tocheck = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__wbuffer_hit_oh = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__inval_hit = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__bdirty = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__wr_ptr = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__check_ptr_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__check_ptr_q1 = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__rtrn_ptr = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__tx_be = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__wr_paddr = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__rd_tag_q = VL_RAND_RESET_Q(44);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__rd_hit_oh_q = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__check_en_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__check_en_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__check_en_q1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__dirty_rd_en = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__rdy = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__evict = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__ni_pending_d = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__ni_pending_q = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__wr_cl_vld_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__wr_cl_idx_q = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__is_nc_miss = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__is_ni = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT____Vcellinp__i_vld_bdirty__in_i = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT____Vcellout__i_rtrn_id_fifo__data_o = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__wtag_comp = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__ni_conflict = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT____Vlvbound2 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT____Vlvbound3 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT____Vlvbound4 = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT____Vlvbound5 = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT____Vlvbound6 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT____Vlvbound7 = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT____Vlvbound9 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT____Vlvbound10 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT____Vlvbound11 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT____Vlvbound12 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT____Vlvbound13 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT____Vlvbound14 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT____Vlvbound15 = VL_RAND_RESET_Q(56);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT____Vlvbound16 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT____Vlvbound17 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT____Vlvbound18 = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_vld_bdirty__DOT__gen_lzc__DOT__index_lut = VL_RAND_RESET_I(24);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_vld_bdirty__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_vld_bdirty__DOT__gen_lzc__DOT__index_nodes = VL_RAND_RESET_I(24);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_vld_bdirty__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_rtrn_id_fifo__DOT__gate_clock = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_rtrn_id_fifo__DOT__read_pointer_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_rtrn_id_fifo__DOT__read_pointer_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_rtrn_id_fifo__DOT__write_pointer_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_rtrn_id_fifo__DOT__write_pointer_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_rtrn_id_fifo__DOT__status_cnt_n = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_rtrn_id_fifo__DOT__status_cnt_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_rtrn_id_fifo__DOT__mem_n = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_rtrn_id_fifo__DOT__mem_q = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_tx_id_rr__DOT__genblk1__DOT__index_nodes = VL_RAND_RESET_I(6);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_tx_id_rr__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_tx_id_rr__DOT__genblk1__DOT__rr_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_tx_id_rr__DOT__genblk1__DOT__req_d = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_tx_id_rr__DOT__genblk1__DOT__gen_int_rr__DOT__rr_d = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_tx_id_rr__DOT__genblk1__DOT__gen_int_rr__DOT__gen_lock__DOT__lock_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_tx_id_rr__DOT__genblk1__DOT__gen_int_rr__DOT__gen_lock__DOT__req_q = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_tx_id_rr__DOT__genblk1__DOT__gen_levels__BRA__0__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_tx_id_rr__DOT__genblk1__DOT__gen_levels__BRA__1__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_tx_id_rr__DOT__genblk1__DOT__gen_levels__BRA__1__KET____DOT__gen_level__BRA__1__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_vld_lzc__DOT__gen_lzc__DOT__index_lut = VL_RAND_RESET_I(24);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_vld_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_vld_lzc__DOT__gen_lzc__DOT__index_nodes = VL_RAND_RESET_I(24);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_vld_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_hit_lzc__DOT__gen_lzc__DOT__index_lut = VL_RAND_RESET_I(24);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_hit_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_hit_lzc__DOT__gen_lzc__DOT__index_nodes = VL_RAND_RESET_I(24);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_hit_lzc__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_dirty_rr__DOT__genblk1__DOT__index_nodes = VL_RAND_RESET_I(21);
    VL_RAND_RESET_W(1071, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_dirty_rr__DOT__genblk1__DOT__data_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_dirty_rr__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(7);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_dirty_rr__DOT__genblk1__DOT__rr_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_dirty_rr__DOT__genblk1__DOT__req_d = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_dirty_rr__DOT__genblk1__DOT__gen_int_rr__DOT__rr_d = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_dirty_rr__DOT__genblk1__DOT__gen_int_rr__DOT__gen_lock__DOT__lock_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_dirty_rr__DOT__genblk1__DOT__gen_int_rr__DOT__gen_lock__DOT__req_q = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_dirty_rr__DOT__genblk1__DOT__gen_levels__BRA__0__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_dirty_rr__DOT__genblk1__DOT__gen_levels__BRA__1__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_dirty_rr__DOT__genblk1__DOT__gen_levels__BRA__1__KET____DOT__gen_level__BRA__1__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_dirty_rr__DOT__genblk1__DOT__gen_levels__BRA__2__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_dirty_rr__DOT__genblk1__DOT__gen_levels__BRA__2__KET____DOT__gen_level__BRA__1__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_dirty_rr__DOT__genblk1__DOT__gen_levels__BRA__2__KET____DOT__gen_level__BRA__2__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_dirty_rr__DOT__genblk1__DOT__gen_levels__BRA__2__KET____DOT__gen_level__BRA__3__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_clean_rr__DOT__genblk1__DOT__index_nodes = VL_RAND_RESET_I(21);
    VL_RAND_RESET_W(1071, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_clean_rr__DOT__genblk1__DOT__data_nodes);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_clean_rr__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(7);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_clean_rr__DOT__genblk1__DOT__rr_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_clean_rr__DOT__genblk1__DOT__gen_int_rr__DOT__rr_d = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_clean_rr__DOT__genblk1__DOT__gen_levels__BRA__0__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_clean_rr__DOT__genblk1__DOT__gen_levels__BRA__1__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_clean_rr__DOT__genblk1__DOT__gen_levels__BRA__1__KET____DOT__gen_level__BRA__1__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_clean_rr__DOT__genblk1__DOT__gen_levels__BRA__2__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_clean_rr__DOT__genblk1__DOT__gen_levels__BRA__2__KET____DOT__gen_level__BRA__1__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_clean_rr__DOT__genblk1__DOT__gen_levels__BRA__2__KET____DOT__gen_level__BRA__2__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_clean_rr__DOT__genblk1__DOT__gen_levels__BRA__2__KET____DOT__gen_level__BRA__3__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__bank_req = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__bank_we = VL_RAND_RESET_I(2);
    VL_RAND_RESET_W(128, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__bank_be);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__bank_idx = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__bank_idx_q = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__bank_off_q = VL_RAND_RESET_I(4);
    VL_RAND_RESET_W(1024, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__bank_wdata);
    VL_RAND_RESET_W(1024, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__bank_rdata);
    VL_RAND_RESET_W(512, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__rdata_cl);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__rd_tag = VL_RAND_RESET_Q(44);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__vld_req = VL_RAND_RESET_I(8);
    VL_RAND_RESET_W(352, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__tag_rdata);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__vld_addr = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__vld_sel_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__wbuffer_hit_oh = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__wbuffer_be = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__wbuffer_rdata = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__rdata = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__wbuffer_cmp_addr = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__cmp_en_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__rd_acked = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__bank_collision = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__rd_req_masked = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__rd_req_prio = VL_RAND_RESET_I(3);
    for (int __Vi0=0; __Vi0<8; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__vld_tag_rdata[__Vi0] = VL_RAND_RESET_Q(45);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT____Vlvbound1 = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__i_rr_arb_tree__DOT__genblk1__DOT__index_nodes = VL_RAND_RESET_I(6);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__i_rr_arb_tree__DOT__genblk1__DOT__gnt_nodes = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__i_rr_arb_tree__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__i_rr_arb_tree__DOT__genblk1__DOT__rr_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__i_rr_arb_tree__DOT__genblk1__DOT__gen_int_rr__DOT__rr_d = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__i_rr_arb_tree__DOT__genblk1__DOT__gen_levels__BRA__0__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__i_rr_arb_tree__DOT__genblk1__DOT__gen_levels__BRA__1__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__i_lzc_wbuffer_hit__DOT__gen_lzc__DOT__index_lut = VL_RAND_RESET_I(24);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__i_lzc_wbuffer_hit__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__i_lzc_wbuffer_hit__DOT__gen_lzc__DOT__index_nodes = VL_RAND_RESET_I(24);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__i_lzc_wbuffer_hit__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__i_lzc_rd_hit__DOT__gen_lzc__DOT__index_lut = VL_RAND_RESET_I(24);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__i_lzc_rd_hit__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__i_lzc_rd_hit__DOT__gen_lzc__DOT__index_nodes = VL_RAND_RESET_I(24);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__i_lzc_rd_hit__DOT__gen_lzc__DOT__in_tmp = VL_RAND_RESET_I(8);
    VL_RAND_RESET_W(512, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__rdata_aligned);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__1__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__1__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__1__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__2__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__2__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__2__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__3__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__3__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__3__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__4__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__4__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__4__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__5__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__5__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__5__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__6__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__6__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__6__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__7__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__7__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__0__KET____DOT__i_data_sram__DOT__gen_cut__BRA__7__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    VL_RAND_RESET_W(512, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__rdata_aligned);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__1__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__1__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__1__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__2__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__2__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__2__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__3__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__3__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__3__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__4__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__4__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__4__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__5__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__5__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__5__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__6__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__6__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__6__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__7__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__7__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_data_banks__BRA__1__KET____DOT__i_data_sram__DOT__gen_cut__BRA__7__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__0__KET____DOT__i_tag_sram__DOT__wdata_aligned = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__0__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__0__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__0__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__1__KET____DOT__i_tag_sram__DOT__wdata_aligned = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__1__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__1__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__1__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__2__KET____DOT__i_tag_sram__DOT__wdata_aligned = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__2__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__2__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__2__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__3__KET____DOT__i_tag_sram__DOT__wdata_aligned = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__3__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__3__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__3__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__4__KET____DOT__i_tag_sram__DOT__wdata_aligned = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__4__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__4__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__4__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__5__KET____DOT__i_tag_sram__DOT__wdata_aligned = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__5__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__5__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__5__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__6__KET____DOT__i_tag_sram__DOT__wdata_aligned = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__6__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__6__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__6__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__7__KET____DOT__i_tag_sram__DOT__wdata_aligned = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__7__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<256; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__7__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__7__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__0__KET____DOT__i_wt_dcache_ctrl__DOT__state_d = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__0__KET____DOT__i_wt_dcache_ctrl__DOT__state_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__0__KET____DOT__i_wt_dcache_ctrl__DOT__address_tag_d = VL_RAND_RESET_Q(44);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__0__KET____DOT__i_wt_dcache_ctrl__DOT__address_tag_q = VL_RAND_RESET_Q(44);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__0__KET____DOT__i_wt_dcache_ctrl__DOT__address_idx_d = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__0__KET____DOT__i_wt_dcache_ctrl__DOT__address_idx_q = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__0__KET____DOT__i_wt_dcache_ctrl__DOT__address_off_d = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__0__KET____DOT__i_wt_dcache_ctrl__DOT__address_off_q = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__0__KET____DOT__i_wt_dcache_ctrl__DOT__vld_data_d = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__0__KET____DOT__i_wt_dcache_ctrl__DOT__vld_data_q = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__0__KET____DOT__i_wt_dcache_ctrl__DOT__save_tag = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__0__KET____DOT__i_wt_dcache_ctrl__DOT__rd_req_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__0__KET____DOT__i_wt_dcache_ctrl__DOT__rd_ack_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__0__KET____DOT__i_wt_dcache_ctrl__DOT__data_size_d = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__0__KET____DOT__i_wt_dcache_ctrl__DOT__data_size_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__1__KET____DOT__i_wt_dcache_ctrl__DOT__state_d = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__1__KET____DOT__i_wt_dcache_ctrl__DOT__state_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__1__KET____DOT__i_wt_dcache_ctrl__DOT__address_tag_d = VL_RAND_RESET_Q(44);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__1__KET____DOT__i_wt_dcache_ctrl__DOT__address_tag_q = VL_RAND_RESET_Q(44);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__1__KET____DOT__i_wt_dcache_ctrl__DOT__address_idx_d = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__1__KET____DOT__i_wt_dcache_ctrl__DOT__address_idx_q = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__1__KET____DOT__i_wt_dcache_ctrl__DOT__address_off_d = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__1__KET____DOT__i_wt_dcache_ctrl__DOT__address_off_q = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__1__KET____DOT__i_wt_dcache_ctrl__DOT__vld_data_d = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__1__KET____DOT__i_wt_dcache_ctrl__DOT__vld_data_q = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__1__KET____DOT__i_wt_dcache_ctrl__DOT__save_tag = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__1__KET____DOT__i_wt_dcache_ctrl__DOT__rd_req_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__1__KET____DOT__i_wt_dcache_ctrl__DOT__rd_ack_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__1__KET____DOT__i_wt_dcache_ctrl__DOT__data_size_d = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__1__KET____DOT__i_wt_dcache_ctrl__DOT__data_size_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__arb_req = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__arb_ack = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__arb_gnt = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__axi_rd_req = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__axi_rd_gnt = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__axi_wr_req = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__axi_wr_gnt = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__axi_rd_rdy = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__axi_rd_lock = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__axi_wr_lock = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__axi_rd_blen = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__axi_rd_id_in = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__axi_wr_id_in = VL_RAND_RESET_I(4);
    VL_RAND_RESET_W(128, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__axi_wr_data);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__axi_wr_be = VL_RAND_RESET_I(16);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__axi_wr_atop = VL_RAND_RESET_I(6);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__invalidate = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__amo_off_d = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__amo_off_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__amo_gen_r_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__amo_gen_r_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__icache_rtrn_tid_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__dcache_rtrn_tid_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__dcache_rd_pop = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__dcache_wr_pop = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT____Vcellout__i_icache_data_fifo__data_o = VL_RAND_RESET_Q(61);
    VL_RAND_RESET_W(135, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT____Vcellout__i_dcache_data_fifo__data_o);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__icache_rtrn_rd_en = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__dcache_rtrn_rd_en = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__icache_rtrn_vld_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__icache_rtrn_vld_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__dcache_rtrn_vld_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__dcache_rtrn_vld_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT____Vcellinp__i_rd_icache_id__push_i = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT____Vcellinp__i_rd_dcache_id__push_i = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT____Vcellinp__i_wr_dcache_id__push_i = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__b_empty = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__b_push = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__b_pop = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT____Vcellout__i_b_fifo__data_o = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT____Vcellinp__i_b_fifo__data_i = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__icache_first_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__icache_first_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__dcache_first_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__dcache_first_q = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(128, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__icache_rd_shift_d);
    VL_RAND_RESET_W(128, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__icache_rd_shift_q);
    VL_RAND_RESET_W(128, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__dcache_rd_shift_d);
    VL_RAND_RESET_W(128, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__dcache_rd_shift_q);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__dcache_rtrn_type_d = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__dcache_rtrn_type_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__dcache_rtrn_inv_d = VL_RAND_RESET_I(17);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__dcache_rtrn_inv_q = VL_RAND_RESET_I(17);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__dcache_sc_rtrn = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rr_arb_tree__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rr_arb_tree__DOT__genblk1__DOT__rr_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rr_arb_tree__DOT__genblk1__DOT__req_d = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rr_arb_tree__DOT__genblk1__DOT__gen_int_rr__DOT__rr_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rr_arb_tree__DOT__genblk1__DOT__gen_int_rr__DOT__gen_lock__DOT__lock_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rr_arb_tree__DOT__genblk1__DOT__gen_int_rr__DOT__gen_lock__DOT__req_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rr_arb_tree__DOT__genblk1__DOT__gen_levels__BRA__0__KET____DOT__gen_level__BRA__0__KET____DOT__sel = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_icache_data_fifo__DOT__gate_clock = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_icache_data_fifo__DOT__read_pointer_n = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_icache_data_fifo__DOT__read_pointer_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_icache_data_fifo__DOT__write_pointer_n = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_icache_data_fifo__DOT__write_pointer_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_icache_data_fifo__DOT__status_cnt_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_icache_data_fifo__DOT__status_cnt_q = VL_RAND_RESET_I(2);
    VL_RAND_RESET_W(122, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_icache_data_fifo__DOT__mem_n);
    VL_RAND_RESET_W(122, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_icache_data_fifo__DOT__mem_q);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_icache_data_fifo__DOT____Vlvbound1 = VL_RAND_RESET_Q(61);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_dcache_data_fifo__DOT__gate_clock = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_dcache_data_fifo__DOT__read_pointer_n = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_dcache_data_fifo__DOT__read_pointer_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_dcache_data_fifo__DOT__write_pointer_n = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_dcache_data_fifo__DOT__write_pointer_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_dcache_data_fifo__DOT__status_cnt_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_dcache_data_fifo__DOT__status_cnt_q = VL_RAND_RESET_I(2);
    VL_RAND_RESET_W(270, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_dcache_data_fifo__DOT__mem_n);
    VL_RAND_RESET_W(270, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_dcache_data_fifo__DOT__mem_q);
    VL_RAND_RESET_W(135, cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_dcache_data_fifo__DOT____Vlvbound1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rd_icache_id__DOT__gate_clock = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rd_icache_id__DOT__read_pointer_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rd_icache_id__DOT__read_pointer_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rd_icache_id__DOT__write_pointer_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rd_icache_id__DOT__write_pointer_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rd_icache_id__DOT__status_cnt_n = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rd_icache_id__DOT__status_cnt_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rd_icache_id__DOT__mem_n = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rd_icache_id__DOT__mem_q = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rd_dcache_id__DOT__gate_clock = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rd_dcache_id__DOT__read_pointer_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rd_dcache_id__DOT__read_pointer_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rd_dcache_id__DOT__write_pointer_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rd_dcache_id__DOT__write_pointer_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rd_dcache_id__DOT__status_cnt_n = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rd_dcache_id__DOT__status_cnt_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rd_dcache_id__DOT__mem_n = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_rd_dcache_id__DOT__mem_q = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_wr_dcache_id__DOT__gate_clock = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_wr_dcache_id__DOT__read_pointer_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_wr_dcache_id__DOT__read_pointer_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_wr_dcache_id__DOT__write_pointer_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_wr_dcache_id__DOT__write_pointer_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_wr_dcache_id__DOT__status_cnt_n = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_wr_dcache_id__DOT__status_cnt_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_wr_dcache_id__DOT__mem_n = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_wr_dcache_id__DOT__mem_q = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_b_fifo__DOT__gate_clock = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_b_fifo__DOT__read_pointer_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_b_fifo__DOT__read_pointer_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_b_fifo__DOT__write_pointer_n = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_b_fifo__DOT__write_pointer_q = VL_RAND_RESET_I(2);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_b_fifo__DOT__status_cnt_n = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_b_fifo__DOT__status_cnt_q = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_b_fifo__DOT__mem_n = VL_RAND_RESET_I(20);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_b_fifo__DOT__mem_q = VL_RAND_RESET_I(20);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_b_fifo__DOT____Vlvbound1 = VL_RAND_RESET_I(5);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_axi_shim__DOT__wr_state_q = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_axi_shim__DOT__wr_state_d = VL_RAND_RESET_I(4);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_axi_shim__DOT__wr_cnt_d = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_axi_shim__DOT__wr_cnt_q = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_axi_shim__DOT__wr_cnt_clr = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__i_axi_shim__DOT__wr_cnt_en = VL_RAND_RESET_I(1);
    cva6_core_only_tb__DOT__i_cva6_axi2mem__DOT__state_d = VL_RAND_RESET_I(3);
    cva6_core_only_tb__DOT__i_cva6_axi2mem__DOT__state_q = VL_RAND_RESET_I(3);
    VL_RAND_RESET_W(82, cva6_core_only_tb__DOT__i_cva6_axi2mem__DOT__ax_req_d);
    VL_RAND_RESET_W(82, cva6_core_only_tb__DOT__i_cva6_axi2mem__DOT__ax_req_q);
    cva6_core_only_tb__DOT__i_cva6_axi2mem__DOT__req_addr_d = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6_axi2mem__DOT__req_addr_q = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6_axi2mem__DOT__cnt_d = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6_axi2mem__DOT__cnt_q = VL_RAND_RESET_I(8);
    cva6_core_only_tb__DOT__i_cva6_axi2mem__DOT__aligned_address = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6_axi2mem__DOT__wrap_boundary = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6_axi2mem__DOT__upper_wrap_boundary = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6_axi2mem__DOT__cons_addr = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6_core_tb_sram__DOT__gen_cut__BRA__0__KET____DOT__i_ram__DOT__RdData_DN = VL_RAND_RESET_Q(64);
    for (int __Vi0=0; __Vi0<1024; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6_core_tb_sram__DOT__gen_cut__BRA__0__KET____DOT__i_ram__DOT__Mem_DP[__Vi0] = VL_RAND_RESET_Q(64);
    }
    for (int __Vi0=0; __Vi0<16777216; ++__Vi0) {
        cva6_core_only_tb__DOT__i_cva6_core_tb_sram__DOT__gen_cut__BRA__0__KET____DOT__i_ram__DOT__Mem_init[__Vi0] = VL_RAND_RESET_I(8);
    }
    cva6_core_only_tb__DOT__i_cva6_core_tb_sram__DOT__gen_cut__BRA__0__KET____DOT__i_ram__DOT__unnamedblk1__DOT__val = VL_RAND_RESET_Q(64);
    cva6_core_only_tb__DOT__i_cva6_core_tb_sram__DOT__gen_cut__BRA__0__KET____DOT__i_ram__DOT__unnamedblk1__DOT__unnamedblk2__DOT__k = 0;
    __Vfunc_uj_imm__0__Vfuncout = VL_RAND_RESET_Q(64);
    __Vfunc_uj_imm__0__instruction_i = VL_RAND_RESET_I(32);
    __Vfunc_sb_imm__1__Vfuncout = VL_RAND_RESET_Q(64);
    __Vfunc_sb_imm__1__instruction_i = VL_RAND_RESET_I(32);
    __Vfunc_uj_imm__2__Vfuncout = VL_RAND_RESET_Q(64);
    __Vfunc_uj_imm__2__instruction_i = VL_RAND_RESET_I(32);
    __Vfunc_sb_imm__3__Vfuncout = VL_RAND_RESET_Q(64);
    __Vfunc_sb_imm__3__instruction_i = VL_RAND_RESET_I(32);
    __Vfunc_is_rd_fpr__4__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rd_fpr__4__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs1_fpr__5__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs2_fpr__6__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rd_fpr__7__op = VL_RAND_RESET_I(7);
    __Vfunc_is_imm_fpr__8__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_imm_fpr__8__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rd_fpr__9__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rd_fpr__9__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs1_fpr__10__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs1_fpr__10__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs2_fpr__11__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs2_fpr__11__op = VL_RAND_RESET_I(7);
    __Vfunc_is_imm_fpr__12__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_imm_fpr__12__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs1_fpr__13__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs1_fpr__13__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs2_fpr__14__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs2_fpr__14__op = VL_RAND_RESET_I(7);
    __Vfunc_is_imm_fpr__15__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_imm_fpr__15__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs1_fpr__16__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs1_fpr__16__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs2_fpr__17__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs2_fpr__17__op = VL_RAND_RESET_I(7);
    __Vfunc_is_imm_fpr__18__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_imm_fpr__18__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs1_fpr__19__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs1_fpr__19__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs2_fpr__20__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs2_fpr__20__op = VL_RAND_RESET_I(7);
    __Vfunc_is_imm_fpr__21__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_imm_fpr__21__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs1_fpr__22__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs1_fpr__22__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs2_fpr__23__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs2_fpr__23__op = VL_RAND_RESET_I(7);
    __Vfunc_is_imm_fpr__24__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_imm_fpr__24__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs1_fpr__25__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs1_fpr__25__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs2_fpr__26__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs2_fpr__26__op = VL_RAND_RESET_I(7);
    __Vfunc_is_imm_fpr__27__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_imm_fpr__27__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs1_fpr__28__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs1_fpr__28__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs2_fpr__29__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs2_fpr__29__op = VL_RAND_RESET_I(7);
    __Vfunc_is_imm_fpr__30__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_imm_fpr__30__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs1_fpr__31__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs1_fpr__31__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs2_fpr__32__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs2_fpr__32__op = VL_RAND_RESET_I(7);
    __Vfunc_is_imm_fpr__33__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_imm_fpr__33__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs1_fpr__34__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs1_fpr__34__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs2_fpr__35__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs2_fpr__35__op = VL_RAND_RESET_I(7);
    __Vfunc_is_imm_fpr__36__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_imm_fpr__36__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs1_fpr__37__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs1_fpr__37__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs2_fpr__38__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs2_fpr__38__op = VL_RAND_RESET_I(7);
    __Vfunc_is_imm_fpr__39__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_imm_fpr__39__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs1_fpr__40__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs1_fpr__40__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs2_fpr__41__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs2_fpr__41__op = VL_RAND_RESET_I(7);
    __Vfunc_is_imm_fpr__42__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_imm_fpr__42__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs1_fpr__43__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs1_fpr__43__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs2_fpr__44__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs2_fpr__44__op = VL_RAND_RESET_I(7);
    __Vfunc_is_imm_fpr__45__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_imm_fpr__45__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs1_fpr__46__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs1_fpr__46__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs2_fpr__47__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs2_fpr__47__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs1_fpr__48__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs1_fpr__48__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs1_fpr__49__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs1_fpr__49__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs2_fpr__50__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs2_fpr__50__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs2_fpr__51__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs2_fpr__51__op = VL_RAND_RESET_I(7);
    __Vfunc_is_imm_fpr__52__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_imm_fpr__52__op = VL_RAND_RESET_I(7);
    __Vfunc_is_imm_fpr__53__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_imm_fpr__53__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs2_fpr__54__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs2_fpr__54__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rd_fpr__55__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rd_fpr__55__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rd_fpr__56__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rd_fpr__56__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs1_fpr__57__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs1_fpr__57__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rs2_fpr__58__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rs2_fpr__58__op = VL_RAND_RESET_I(7);
    __Vfunc_op_is_branch__59__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_op_is_branch__59__op = VL_RAND_RESET_I(7);
    __Vfunc_sext32__60__Vfuncout = VL_RAND_RESET_Q(64);
    __Vfunc_sext32__60__operand = VL_RAND_RESET_I(32);
    __Vfunc_sext32__61__Vfuncout = VL_RAND_RESET_Q(64);
    __Vfunc_sext32__61__operand = VL_RAND_RESET_I(32);
    __Vfunc_sext32__62__Vfuncout = VL_RAND_RESET_Q(64);
    __Vfunc_sext32__62__operand = VL_RAND_RESET_I(32);
    __Vfunc_sext32__63__Vfuncout = VL_RAND_RESET_Q(64);
    __Vfunc_sext32__63__operand = VL_RAND_RESET_I(32);
    __Vfunc_be_gen__64__Vfuncout = VL_RAND_RESET_I(8);
    __Vfunc_be_gen__64__addr = VL_RAND_RESET_I(3);
    __Vfunc_be_gen__64__size = VL_RAND_RESET_I(2);
    __Vfunc_extract_transfer_size__65__Vfuncout = VL_RAND_RESET_I(2);
    __Vfunc_extract_transfer_size__65__op = VL_RAND_RESET_I(7);
    __Vfunc_is_inside_execute_regions__66__Vfuncout = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(6434, __Vfunc_is_inside_execute_regions__66__Cfg);
    __Vfunc_is_inside_execute_regions__66__address = VL_RAND_RESET_Q(64);
    __Vfunc_is_inside_execute_regions__66__pass = VL_RAND_RESET_I(16);
    __Vfunc_is_inside_execute_regions__66__unnamedblk2__DOT__k = 0;
    __Vfunc_range_check__67__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_range_check__67__base = VL_RAND_RESET_Q(64);
    __Vfunc_range_check__67__len = VL_RAND_RESET_Q(64);
    __Vfunc_range_check__67__address = VL_RAND_RESET_Q(64);
    __Vfunc_is_amo__68__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_amo__68__op = VL_RAND_RESET_I(7);
    __Vfunc_data_align__69__Vfuncout = VL_RAND_RESET_Q(64);
    __Vfunc_data_align__69__addr = VL_RAND_RESET_I(3);
    __Vfunc_data_align__69__data = VL_RAND_RESET_Q(64);
    __Vfunc_data_align__69__addr_tmp = VL_RAND_RESET_I(3);
    __Vfunc_data_align__69__data_tmp = VL_RAND_RESET_Q(64);
    __Vfunc_extract_transfer_size__70__Vfuncout = VL_RAND_RESET_I(2);
    __Vfunc_extract_transfer_size__70__op = VL_RAND_RESET_I(7);
    __Vfunc_is_inside_nonidempotent_regions__71__Vfuncout = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(6434, __Vfunc_is_inside_nonidempotent_regions__71__Cfg);
    __Vfunc_is_inside_nonidempotent_regions__71__address = VL_RAND_RESET_Q(64);
    __Vfunc_is_inside_nonidempotent_regions__71__pass = VL_RAND_RESET_I(16);
    __Vfunc_is_inside_nonidempotent_regions__71__unnamedblk1__DOT__k = 0;
    __Vfunc_range_check__72__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_range_check__72__base = VL_RAND_RESET_Q(64);
    __Vfunc_range_check__72__len = VL_RAND_RESET_Q(64);
    __Vfunc_range_check__72__address = VL_RAND_RESET_Q(64);
    __Vfunc_extract_transfer_size__73__Vfuncout = VL_RAND_RESET_I(2);
    __Vfunc_extract_transfer_size__73__op = VL_RAND_RESET_I(7);
    __Vfunc_get_opgroup__74__Vfuncout = VL_RAND_RESET_I(2);
    __Vfunc_get_opgroup__74__op = VL_RAND_RESET_I(4);
    __Vfunc_get_opgroup__75__Vfuncout = VL_RAND_RESET_I(2);
    __Vfunc_get_opgroup__75__op = VL_RAND_RESET_I(4);
    __Vfunc_get_opgroup__76__Vfuncout = VL_RAND_RESET_I(2);
    __Vfunc_get_opgroup__76__op = VL_RAND_RESET_I(4);
    __Vfunc_get_opgroup__77__Vfuncout = VL_RAND_RESET_I(2);
    __Vfunc_get_opgroup__77__op = VL_RAND_RESET_I(4);
    __Vfunc_get_opgroup__78__Vfuncout = VL_RAND_RESET_I(2);
    __Vfunc_get_opgroup__78__op = VL_RAND_RESET_I(4);
    __Vfunc_get_first_enabled_multi__79__Vfuncout = VL_RAND_RESET_I(3);
    __Vfunc_get_first_enabled_multi__79__types = VL_RAND_RESET_I(10);
    __Vfunc_get_first_enabled_multi__79__cfg = VL_RAND_RESET_I(5);
    __Vfunc_get_first_enabled_multi__80__Vfuncout = VL_RAND_RESET_I(3);
    __Vfunc_get_first_enabled_multi__80__types = VL_RAND_RESET_I(10);
    __Vfunc_get_first_enabled_multi__80__cfg = VL_RAND_RESET_I(5);
    __Vfunc_bias__85__Vfuncout = 0;
    __Vfunc_bias__85__fmt = VL_RAND_RESET_I(3);
    __Vfunc_bias__86__Vfuncout = 0;
    __Vfunc_bias__86__fmt = VL_RAND_RESET_I(3);
    __Vfunc_bias__87__Vfuncout = 0;
    __Vfunc_bias__87__fmt = VL_RAND_RESET_I(3);
    __Vfunc_bias__88__Vfuncout = 0;
    __Vfunc_bias__88__fmt = VL_RAND_RESET_I(3);
    __Vfunc_exp_bits__89__Vfuncout = 0;
    __Vfunc_exp_bits__89__fmt = VL_RAND_RESET_I(3);
    __Vfunc_get_first_enabled_multi__90__Vfuncout = VL_RAND_RESET_I(3);
    __Vfunc_get_first_enabled_multi__90__types = VL_RAND_RESET_I(10);
    __Vfunc_get_first_enabled_multi__90__cfg = VL_RAND_RESET_I(5);
    __Vfunc_get_first_enabled_multi__91__Vfuncout = VL_RAND_RESET_I(3);
    __Vfunc_get_first_enabled_multi__91__types = VL_RAND_RESET_I(10);
    __Vfunc_get_first_enabled_multi__91__cfg = VL_RAND_RESET_I(5);
    __Vfunc_is_rd_fpr__96__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rd_fpr__96__op = VL_RAND_RESET_I(7);
    __Vfunc_is_amo__97__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_amo__97__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rd_fpr__98__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rd_fpr__98__op = VL_RAND_RESET_I(7);
    __Vfunc_is_rd_fpr__99__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_is_rd_fpr__99__op = VL_RAND_RESET_I(7);
    __Vfunc_is_inside_cacheable_regions__100__Vfuncout = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(6434, __Vfunc_is_inside_cacheable_regions__100__Cfg);
    __Vfunc_is_inside_cacheable_regions__100__address = VL_RAND_RESET_Q(64);
    __Vfunc_is_inside_cacheable_regions__100__pass = VL_RAND_RESET_I(16);
    __Vfunc_is_inside_cacheable_regions__100__unnamedblk3__DOT__k = 0;
    __Vfunc_range_check__101__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_range_check__101__base = VL_RAND_RESET_Q(64);
    __Vfunc_range_check__101__len = VL_RAND_RESET_Q(64);
    __Vfunc_range_check__101__address = VL_RAND_RESET_Q(64);
    __Vfunc_is_inside_nonidempotent_regions__102__Vfuncout = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(6434, __Vfunc_is_inside_nonidempotent_regions__102__Cfg);
    __Vfunc_is_inside_nonidempotent_regions__102__address = VL_RAND_RESET_Q(64);
    __Vfunc_is_inside_nonidempotent_regions__102__pass = VL_RAND_RESET_I(16);
    __Vfunc_is_inside_nonidempotent_regions__102__unnamedblk1__DOT__k = 0;
    __Vfunc_range_check__103__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_range_check__103__base = VL_RAND_RESET_Q(64);
    __Vfunc_range_check__103__len = VL_RAND_RESET_Q(64);
    __Vfunc_range_check__103__address = VL_RAND_RESET_Q(64);
    __Vfunc_icache_way_bin2oh__104__Vfuncout = VL_RAND_RESET_I(4);
    __Vfunc_icache_way_bin2oh__104__in = VL_RAND_RESET_I(2);
    __Vfunc_icache_way_bin2oh__104__out = VL_RAND_RESET_I(4);
    __Vfunc_icache_way_bin2oh__105__Vfuncout = VL_RAND_RESET_I(4);
    __Vfunc_icache_way_bin2oh__105__in = VL_RAND_RESET_I(2);
    __Vfunc_icache_way_bin2oh__105__out = VL_RAND_RESET_I(4);
    __Vfunc_paddrSizeAlign__106__Vfuncout = VL_RAND_RESET_Q(56);
    __Vfunc_paddrSizeAlign__106__paddr = VL_RAND_RESET_Q(56);
    __Vfunc_paddrSizeAlign__106__size = VL_RAND_RESET_I(3);
    __Vfunc_paddrSizeAlign__106__out = VL_RAND_RESET_Q(56);
    __Vfunc_dcache_way_bin2oh__107__Vfuncout = VL_RAND_RESET_I(8);
    __Vfunc_dcache_way_bin2oh__107__in = VL_RAND_RESET_I(3);
    __Vfunc_dcache_way_bin2oh__107__out = VL_RAND_RESET_I(8);
    __Vfunc_dcache_way_bin2oh__108__Vfuncout = VL_RAND_RESET_I(8);
    __Vfunc_dcache_way_bin2oh__108__in = VL_RAND_RESET_I(3);
    __Vfunc_dcache_way_bin2oh__108__out = VL_RAND_RESET_I(8);
    __Vfunc_dcache_way_bin2oh__109__Vfuncout = VL_RAND_RESET_I(8);
    __Vfunc_dcache_way_bin2oh__109__in = VL_RAND_RESET_I(3);
    __Vfunc_dcache_way_bin2oh__109__out = VL_RAND_RESET_I(8);
    __Vfunc_is_inside_cacheable_regions__110__Vfuncout = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(6434, __Vfunc_is_inside_cacheable_regions__110__Cfg);
    __Vfunc_is_inside_cacheable_regions__110__address = VL_RAND_RESET_Q(64);
    __Vfunc_is_inside_cacheable_regions__110__pass = VL_RAND_RESET_I(16);
    __Vfunc_is_inside_cacheable_regions__110__unnamedblk3__DOT__k = 0;
    __Vfunc_range_check__111__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_range_check__111__base = VL_RAND_RESET_Q(64);
    __Vfunc_range_check__111__len = VL_RAND_RESET_Q(64);
    __Vfunc_range_check__111__address = VL_RAND_RESET_Q(64);
    __Vfunc_is_inside_nonidempotent_regions__112__Vfuncout = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(6434, __Vfunc_is_inside_nonidempotent_regions__112__Cfg);
    __Vfunc_is_inside_nonidempotent_regions__112__address = VL_RAND_RESET_Q(64);
    __Vfunc_is_inside_nonidempotent_regions__112__pass = VL_RAND_RESET_I(16);
    __Vfunc_is_inside_nonidempotent_regions__112__unnamedblk1__DOT__k = 0;
    __Vfunc_range_check__113__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_range_check__113__base = VL_RAND_RESET_Q(64);
    __Vfunc_range_check__113__len = VL_RAND_RESET_Q(64);
    __Vfunc_range_check__113__address = VL_RAND_RESET_Q(64);
    __Vfunc_toSize64__114__Vfuncout = VL_RAND_RESET_I(2);
    __Vfunc_toSize64__114__be = VL_RAND_RESET_I(8);
    __Vfunc_toSize64__114__size = VL_RAND_RESET_I(2);
    __Vfunc_repData64__115__Vfuncout = VL_RAND_RESET_Q(64);
    __Vfunc_repData64__115__data = VL_RAND_RESET_Q(64);
    __Vfunc_repData64__115__offset = VL_RAND_RESET_I(3);
    __Vfunc_repData64__115__size = VL_RAND_RESET_I(2);
    __Vfunc_repData64__115__out = VL_RAND_RESET_Q(64);
    __Vfunc_toByteEnable8__116__Vfuncout = VL_RAND_RESET_I(8);
    __Vfunc_toByteEnable8__116__offset = VL_RAND_RESET_I(3);
    __Vfunc_toByteEnable8__116__size = VL_RAND_RESET_I(2);
    __Vfunc_toByteEnable8__116__be = VL_RAND_RESET_I(8);
    __Vfunc_dcache_cl_bin2oh__117__Vfuncout = VL_RAND_RESET_I(2);
    __Vfunc_dcache_cl_bin2oh__117__in = VL_RAND_RESET_I(1);
    __Vfunc_dcache_cl_bin2oh__117__out = VL_RAND_RESET_I(2);
    __Vfunc_dcache_cl_bin2oh__118__Vfuncout = VL_RAND_RESET_I(2);
    __Vfunc_dcache_cl_bin2oh__118__in = VL_RAND_RESET_I(1);
    __Vfunc_dcache_cl_bin2oh__118__out = VL_RAND_RESET_I(2);
    __Vfunc_dcache_cl_bin2oh__119__Vfuncout = VL_RAND_RESET_I(2);
    __Vfunc_dcache_cl_bin2oh__119__in = VL_RAND_RESET_I(1);
    __Vfunc_dcache_cl_bin2oh__119__out = VL_RAND_RESET_I(2);
    __Vfunc_is_inside_cacheable_regions__120__Vfuncout = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(6434, __Vfunc_is_inside_cacheable_regions__120__Cfg);
    __Vfunc_is_inside_cacheable_regions__120__address = VL_RAND_RESET_Q(64);
    __Vfunc_is_inside_cacheable_regions__120__pass = VL_RAND_RESET_I(16);
    __Vfunc_is_inside_cacheable_regions__120__unnamedblk3__DOT__k = 0;
    __Vfunc_range_check__121__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_range_check__121__base = VL_RAND_RESET_Q(64);
    __Vfunc_range_check__121__len = VL_RAND_RESET_Q(64);
    __Vfunc_range_check__121__address = VL_RAND_RESET_Q(64);
    __Vfunc_is_inside_cacheable_regions__122__Vfuncout = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(6434, __Vfunc_is_inside_cacheable_regions__122__Cfg);
    __Vfunc_is_inside_cacheable_regions__122__address = VL_RAND_RESET_Q(64);
    __Vfunc_is_inside_cacheable_regions__122__pass = VL_RAND_RESET_I(16);
    __Vfunc_is_inside_cacheable_regions__122__unnamedblk3__DOT__k = 0;
    __Vfunc_range_check__123__Vfuncout = VL_RAND_RESET_I(1);
    __Vfunc_range_check__123__base = VL_RAND_RESET_Q(64);
    __Vfunc_range_check__123__len = VL_RAND_RESET_Q(64);
    __Vfunc_range_check__123__address = VL_RAND_RESET_Q(64);
    __Vfunc_toByteEnable8__124__Vfuncout = VL_RAND_RESET_I(8);
    __Vfunc_toByteEnable8__124__offset = VL_RAND_RESET_I(3);
    __Vfunc_toByteEnable8__124__size = VL_RAND_RESET_I(2);
    __Vfunc_toByteEnable8__124__be = VL_RAND_RESET_I(8);
    __Vfunc_toByteEnable8__125__Vfuncout = VL_RAND_RESET_I(8);
    __Vfunc_toByteEnable8__125__offset = VL_RAND_RESET_I(3);
    __Vfunc_toByteEnable8__125__size = VL_RAND_RESET_I(2);
    __Vfunc_toByteEnable8__125__be = VL_RAND_RESET_I(8);
    __Vfunc_cva6_core_only_tb__DOT__i_cva6_axi2mem__DOT__get_wrap_bounadry__126__Vfuncout = VL_RAND_RESET_Q(64);
    __Vfunc_cva6_core_only_tb__DOT__i_cva6_axi2mem__DOT__get_wrap_bounadry__126__unaligned_address = VL_RAND_RESET_Q(64);
    __Vfunc_cva6_core_only_tb__DOT__i_cva6_axi2mem__DOT__get_wrap_bounadry__126__len = VL_RAND_RESET_I(8);
    __Vfunc_cva6_core_only_tb__DOT__i_cva6_axi2mem__DOT__get_wrap_bounadry__126__warp_address = VL_RAND_RESET_Q(64);
    __Vtableidx1 = 0;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__fpu_ready_ex_id[0] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__fpu_ready_ex_id[1] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__fpu_ready_ex_id[2] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__fpu_ready_ex_id[3] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__fpu_ready_ex_id[4] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__fpu_ready_ex_id[5] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__fpu_ready_ex_id[6] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__fpu_ready_ex_id[7] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__fpu_ready_ex_id[8] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__fpu_ready_ex_id[9] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__fpu_ready_ex_id[10] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__fpu_ready_ex_id[11] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__fpu_ready_ex_id[12] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__fpu_ready_ex_id[13] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__fpu_ready_ex_id[14] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__fpu_ready_ex_id[15] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_in_valid[0] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_in_valid[1] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_in_valid[2] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_in_valid[3] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_in_valid[4] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_in_valid[5] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_in_valid[6] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_in_valid[7] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_in_valid[8] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_in_valid[9] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_in_valid[10] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_in_valid[11] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_in_valid[12] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_in_valid[13] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_in_valid[14] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_in_valid[15] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__hold_inputs[0] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__hold_inputs[1] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__hold_inputs[2] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__hold_inputs[3] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__hold_inputs[4] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__hold_inputs[5] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__hold_inputs[6] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__hold_inputs[7] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__hold_inputs[8] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__hold_inputs[9] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__hold_inputs[10] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__hold_inputs[11] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__hold_inputs[12] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__hold_inputs[13] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__hold_inputs[14] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__hold_inputs[15] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__use_hold[0] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__use_hold[1] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__use_hold[2] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__use_hold[3] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__use_hold[4] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__use_hold[5] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__use_hold[6] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__use_hold[7] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__use_hold[8] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__use_hold[9] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__use_hold[10] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__use_hold[11] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__use_hold[12] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__use_hold[13] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__use_hold[14] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__use_hold[15] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__state_d[0] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__state_d[1] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__state_d[2] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__state_d[3] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__state_d[4] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__state_d[5] = 1U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__state_d[6] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__state_d[7] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__state_d[8] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__state_d[9] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__state_d[10] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__state_d[11] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__state_d[12] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__state_d[13] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__state_d[14] = 0U;
    __Vtable1_cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__state_d[15] = 0U;
    __Vdlyvdim0__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__0__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP__v0 = 0;
    __Vdlyvlsb__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__0__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP__v0 = 0;
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__0__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP__v0 = VL_RAND_RESET_I(8);
    __Vdlyvset__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__0__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP__v0 = 0;
    __Vdlyvdim0__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__0__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP__v1 = 0;
    __Vdlyvlsb__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__0__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP__v1 = 0;
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__gen_tag_srams__BRA__0__KET____DOT__i_tag_sram__DOT__gen_cut__BRA__0__KET____DOT__gen_mem__DOT__i_ram__DOT__Mem_DP__v1 = VL_RAND_RESET_I(8);
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    VL_RAND_RESET_W(65, __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_btb__DOT__btb_q__v21);
    VL_RAND_RESET_W(65, __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_btb__DOT__btb_q__v22);
    VL_RAND_RESET_W(65, __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_btb__DOT__btb_q__v23);
    VL_RAND_RESET_W(65, __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_btb__DOT__btb_q__v24);
    VL_RAND_RESET_W(65, __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_btb__DOT__btb_q__v25);
    VL_RAND_RESET_W(65, __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_btb__DOT__btb_q__v26);
    VL_RAND_RESET_W(65, __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_btb__DOT__btb_q__v27);
    VL_RAND_RESET_W(65, __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_btb__DOT__btb_q__v28);
    VL_RAND_RESET_W(65, __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_btb__DOT__btb_q__v29);
    VL_RAND_RESET_W(65, __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_btb__DOT__btb_q__v30);
    VL_RAND_RESET_W(65, __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_btb__DOT__btb_q__v31);
    __Vdlyvset__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_btb__DOT__btb_q__v32 = 0;
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v0 = VL_RAND_RESET_I(3);
    __Vdlyvset__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v0 = 0;
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v1 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v2 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v3 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v4 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v5 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v6 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v7 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v8 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v9 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v10 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v11 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v12 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v13 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v14 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v15 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v16 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v17 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v18 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v19 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v20 = VL_RAND_RESET_I(3);
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    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v22 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v23 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v24 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v25 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v26 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v27 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v28 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v29 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v30 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v31 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v32 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v33 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v34 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v35 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v36 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v37 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v38 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v39 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v40 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v41 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v42 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v43 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v44 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v45 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v46 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v47 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v48 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v49 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v50 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v51 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v52 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v53 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v54 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v55 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v56 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v57 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v58 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v59 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v60 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v61 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v62 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v63 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v64 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v65 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v66 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v67 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v68 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v69 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v70 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v71 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v72 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v73 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v74 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v75 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v76 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v77 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v78 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v79 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v80 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v81 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v82 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v83 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v84 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v85 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v86 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v87 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v88 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v89 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v90 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v91 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v92 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v93 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v94 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v95 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v96 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v97 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v98 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v99 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v100 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v101 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v102 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v103 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v104 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v105 = VL_RAND_RESET_I(3);
    __Vdlyvval__cva6_core_only_tb__DOT__i_cva6__DOT__i_frontend__DOT__i_bht__DOT__bht_q__v106 = VL_RAND_RESET_I(3);
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    VL_RAND_RESET_W(384, __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
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    VL_RAND_RESET_W(384, __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
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    VL_RAND_RESET_W(384, __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
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    VL_RAND_RESET_W(384, __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_ptw__DOT__i_pmp_ptw__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
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    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
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    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
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    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
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    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
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    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
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    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
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    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
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    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_if__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
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    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__0__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
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    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__1__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
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    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__2__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
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    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__3__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
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    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__4__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
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    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__5__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
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    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__6__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
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    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_Q(64);
    VL_RAND_RESET_W(384, __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__lsu_i__DOT__i_mmu__DOT__i_pmp_data__DOT__gen_pmp__DOT__genblk1__BRA__7__KET____DOT__i_pmp_entry__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__fpu_in_ready = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(216, __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__i_arbiter__DOT__genblk1__DOT__data_nodes);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__i_arbiter__DOT__genblk1__DOT__gnt_nodes = VL_RAND_RESET_I(3);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__i_arbiter__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(3);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__fmt_in_ready = VL_RAND_RESET_I(5);
    VL_RAND_RESET_W(511, __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__data_nodes);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__gnt_nodes = VL_RAND_RESET_I(7);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(7);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__inp_pipe_ready = VL_RAND_RESET_I(2);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__mid_pipe_ready = VL_RAND_RESET_I(2);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__regular_status = VL_RAND_RESET_I(5);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_I(32);
    VL_RAND_RESET_W(160, __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__0__KET____DOT__i_opgroup_block__DOT__gen_merged_slice__DOT__i_multifmt_slice__DOT__gen_num_lanes__BRA__0__KET____DOT__active_lane__DOT__lane_instance__DOT__i_fpnew_fma_multi__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes);
    VL_RAND_RESET_W(511, __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__data_nodes);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__1__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(7);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__fmt_in_ready = VL_RAND_RESET_I(5);
    VL_RAND_RESET_W(511, __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__data_nodes);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__2__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(7);
    VL_RAND_RESET_W(511, __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__data_nodes);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__ex_stage_i__DOT__fpu_gen__DOT__fpu_i__DOT__fpu_gen__DOT__i_fpnew_bulk__DOT__gen_operation_groups__BRA__3__KET____DOT__i_opgroup_block__DOT__i_arbiter__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(7);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__csr_regfile_i__DOT__csr_read = VL_RAND_RESET_I(1);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__icache_adapter_data_req = VL_RAND_RESET_I(1);
    VL_RAND_RESET_W(135, __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__dcache_adapter);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__i_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_I(4);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__i_lzc__DOT__gen_lzc__DOT__index_nodes = VL_RAND_RESET_I(8);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__i_lzc_hit__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_I(4);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_cva6_icache__DOT__i_lzc_hit__DOT__gen_lzc__DOT__index_nodes = VL_RAND_RESET_I(8);
    VL_RAND_RESET_W(66, __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT____Vcellout__i_wt_dcache_wbuffer__req_port_o);
    VL_RAND_RESET_W(66, __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT____Vcellout__gen_rd_ports__BRA__0__KET____DOT__i_wt_dcache_ctrl__req_port_o);
    VL_RAND_RESET_W(66, __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT____Vcellout__gen_rd_ports__BRA__1__KET____DOT__i_wt_dcache_ctrl__req_port_o);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__i_lzc_reqs__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_I(4);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__i_lzc_reqs__DOT__gen_lzc__DOT__index_nodes = VL_RAND_RESET_I(8);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__i_lzc_inv__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_I(8);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_missunit__DOT__i_lzc_inv__DOT__gen_lzc__DOT__index_nodes = VL_RAND_RESET_I(24);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_vld_bdirty__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_I(8);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_vld_bdirty__DOT__gen_lzc__DOT__index_nodes = VL_RAND_RESET_I(24);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_tx_id_rr__DOT__genblk1__DOT__index_nodes = VL_RAND_RESET_I(6);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_tx_id_rr__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(3);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_vld_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_I(8);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_vld_lzc__DOT__gen_lzc__DOT__index_nodes = VL_RAND_RESET_I(24);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_hit_lzc__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_I(8);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_hit_lzc__DOT__gen_lzc__DOT__index_nodes = VL_RAND_RESET_I(24);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_dirty_rr__DOT__genblk1__DOT__index_nodes = VL_RAND_RESET_I(21);
    VL_RAND_RESET_W(1071, __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_dirty_rr__DOT__genblk1__DOT__data_nodes);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_dirty_rr__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(7);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_clean_rr__DOT__genblk1__DOT__index_nodes = VL_RAND_RESET_I(21);
    VL_RAND_RESET_W(1071, __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_clean_rr__DOT__genblk1__DOT__data_nodes);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_wbuffer__DOT__i_clean_rr__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(7);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__i_rr_arb_tree__DOT__genblk1__DOT__index_nodes = VL_RAND_RESET_I(6);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__i_rr_arb_tree__DOT__genblk1__DOT__gnt_nodes = VL_RAND_RESET_I(3);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__i_rr_arb_tree__DOT__genblk1__DOT__req_nodes = VL_RAND_RESET_I(3);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__i_lzc_wbuffer_hit__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_I(8);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__i_lzc_wbuffer_hit__DOT__gen_lzc__DOT__index_nodes = VL_RAND_RESET_I(24);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__i_lzc_rd_hit__DOT__gen_lzc__DOT__sel_nodes = VL_RAND_RESET_I(8);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__i_wt_dcache_mem__DOT__i_lzc_rd_hit__DOT__gen_lzc__DOT__index_nodes = VL_RAND_RESET_I(24);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__0__KET____DOT__i_wt_dcache_ctrl__DOT__address_tag_d = VL_RAND_RESET_Q(44);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_wt_dcache__DOT__gen_rd_ports__BRA__1__KET____DOT__i_wt_dcache_ctrl__DOT__address_tag_d = VL_RAND_RESET_Q(44);
    __Vchglast__TOP__cva6_core_only_tb__DOT__i_cva6__DOT__i_cache_subsystem__DOT__i_adapter__DOT__axi_rd_rdy = VL_RAND_RESET_I(1);
}
